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Re: [PATCH v11 11/16] target/riscv: Add orc.b instruction for Zbb, remov
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From: |
Philipp Tomsich |
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Subject: |
Re: [PATCH v11 11/16] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci |
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Date: |
Tue, 28 Sep 2021 23:00:25 +0200 |
Richard & Alistair,
On Tue, 28 Sept 2021 at 20:45, Philipp Tomsich <philipp.tomsich@vrull.eu> wrote:
>
> On Tue, 28 Sept 2021 at 20:45, Richard Henderson
> <richard.henderson@linaro.org> wrote:
> >
> > On 9/28/21 11:45 AM, Philipp Tomsich wrote:
> > > The dup_const macro is returning an unsigned long long, which probably
> > > should be fixed on the tcg.h-level instead of forcing a cast to
> > > target_long
> > > at the call site.
> >
> > No, dup_const is first and primarily for vector support, and therefore must
> > return a
> > 64-bit constant.
> >
> > > Or should we introduce a dup_const_tl?
> >
> > Maybe. I guess that could be a bit better than the cast.
>
> I'll provide a patch that wraps dup_const in a dup_const_tl.
A fix is in patchworks:
https://patchwork.kernel.org/project/qemu-devel/list/?series=554539
Thanks,
Philipp.
- [PATCH v11 03/16] target/riscv: clwz must ignore high bits (use shift-left & changed logic), (continued)
- [PATCH v11 09/16] target/riscv: Add instructions of the Zbc-extension, Philipp Tomsich, 2021/09/11
- [PATCH v11 11/16] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci, Philipp Tomsich, 2021/09/11
- Re: [PATCH v11 11/16] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci, Alistair Francis, 2021/09/28
- Re: [PATCH v11 11/16] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci, Philipp Tomsich, 2021/09/28
- Re: [PATCH v11 11/16] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci, Richard Henderson, 2021/09/28
- Re: [PATCH v11 11/16] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci, Philipp Tomsich, 2021/09/28
- Re: [PATCH v11 11/16] target/riscv: Add orc.b instruction for Zbb, removing gorc/gorci,
Philipp Tomsich <=
[PATCH v11 12/16] target/riscv: Add a REQUIRE_32BIT macro, Philipp Tomsich, 2021/09/11
[PATCH v11 16/16] disas/riscv: Add Zb[abcs] instructions, Philipp Tomsich, 2021/09/11
[PATCH v11 08/16] target/riscv: Reassign instructions to the Zbs-extension, Philipp Tomsich, 2021/09/11
[PATCH v11 07/16] target/riscv: Remove shift-one instructions (proposed Zbo in pre-0.93 draft-B), Philipp Tomsich, 2021/09/11
Re: [PATCH v11 00/16] target/riscv: Update QEmu for Zb[abcs] 1.0.0, Philipp Tomsich, 2021/09/23
Re: [PATCH v11 00/16] target/riscv: Update QEmu for Zb[abcs] 1.0.0, Vineet Gupta, 2021/09/27