[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 28/32] qtest/numa-test: Specify CPU topology in aarch64_numa_cpu()
From: |
Peter Maydell |
Subject: |
[PULL 28/32] qtest/numa-test: Specify CPU topology in aarch64_numa_cpu() |
Date: |
Mon, 9 May 2022 12:58:44 +0100 |
From: Gavin Shan <gshan@redhat.com>
The CPU topology isn't enabled on arm/virt machine yet, but we're
going to do it in next patch. After the CPU topology is enabled by
next patch, "thread-id=1" becomes invalid because the CPU core is
preferred on arm/virt machine. It means these two CPUs have 0/1
as their core IDs, but their thread IDs are all 0. It will trigger
test failure as the following message indicates:
[14/21 qemu:qtest+qtest-aarch64 / qtest-aarch64/numa-test ERROR
1.48s killed by signal 6 SIGABRT
>>>
G_TEST_DBUS_DAEMON=/home/gavin/sandbox/qemu.main/tests/dbus-vmstate-daemon.sh \
QTEST_QEMU_STORAGE_DAEMON_BINARY=./storage-daemon/qemu-storage-daemon
\
QTEST_QEMU_BINARY=./qemu-system-aarch64
\
QTEST_QEMU_IMG=./qemu-img MALLOC_PERTURB_=83
\
/home/gavin/sandbox/qemu.main/build/tests/qtest/numa-test --tap -k
――――――――――――――――――――――――――――――――――――――――――――――
stderr:
qemu-system-aarch64: -numa cpu,node-id=0,thread-id=1: no match found
This fixes the issue by providing comprehensive SMP configurations
in aarch64_numa_cpu(). The SMP configurations aren't used before
the CPU topology is enabled in next patch.
Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Yanan Wang <wangyanan55@huawei.com>
Message-id: 20220503140304.855514-3-gshan@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
tests/qtest/numa-test.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tests/qtest/numa-test.c b/tests/qtest/numa-test.c
index 749429dd27e..976526e5275 100644
--- a/tests/qtest/numa-test.c
+++ b/tests/qtest/numa-test.c
@@ -223,7 +223,8 @@ static void aarch64_numa_cpu(const void *data)
QTestState *qts;
g_autofree char *cli = NULL;
- cli = make_cli(data, "-machine smp.cpus=2 "
+ cli = make_cli(data, "-machine "
+ "smp.cpus=2,smp.sockets=1,smp.clusters=1,smp.cores=1,smp.threads=2 "
"-numa node,nodeid=0,memdev=ram -numa node,nodeid=1 "
"-numa cpu,node-id=1,thread-id=0 "
"-numa cpu,node-id=0,thread-id=1");
--
2.25.1
- [PULL 19/32] target/arm: Enable FEAT_IESB for -cpu max, (continued)
- [PULL 19/32] target/arm: Enable FEAT_IESB for -cpu max, Peter Maydell, 2022/05/09
- [PULL 20/32] target/arm: Enable FEAT_CSV2 for -cpu max, Peter Maydell, 2022/05/09
- [PULL 18/32] target/arm: Enable FEAT_RAS for -cpu max, Peter Maydell, 2022/05/09
- [PULL 21/32] target/arm: Enable FEAT_CSV2_2 for -cpu max, Peter Maydell, 2022/05/09
- [PULL 22/32] target/arm: Enable FEAT_CSV3 for -cpu max, Peter Maydell, 2022/05/09
- [PULL 24/32] target/arm: Define cortex-a76, Peter Maydell, 2022/05/09
- [PULL 23/32] target/arm: Enable FEAT_DGH for -cpu max, Peter Maydell, 2022/05/09
- [PULL 13/32] target/arm: Enable FEAT_Debugv8p4 for -cpu max, Peter Maydell, 2022/05/09
- [PULL 27/32] qapi/machine.json: Add cluster-id, Peter Maydell, 2022/05/09
- [PULL 25/32] target/arm: Define neoverse-n1, Peter Maydell, 2022/05/09
- [PULL 28/32] qtest/numa-test: Specify CPU topology in aarch64_numa_cpu(),
Peter Maydell <=
- [PULL 26/32] hw/arm: add versioning to sbsa-ref machine DT, Peter Maydell, 2022/05/09
- [PULL 14/32] target/arm: Add minimal RAS registers, Peter Maydell, 2022/05/09
- [PULL 31/32] hw/arm/virt: Fix CPU's default NUMA node ID, Peter Maydell, 2022/05/09
- [PULL 29/32] hw/arm/virt: Consider SMP configuration in CPU topology, Peter Maydell, 2022/05/09
- [PULL 32/32] hw/acpi/aml-build: Use existing CPU topology to build PPTT table, Peter Maydell, 2022/05/09
- [PULL 30/32] qtest/numa-test: Correct CPU and NUMA association in aarch64_numa_cpu(), Peter Maydell, 2022/05/09
- Re: [PULL 00/32] target-arm queue, Richard Henderson, 2022/05/09