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[PULL 01/17] target/i386: Remove LBREn bit check when access Arch LBR MS
From: |
Paolo Bonzini |
Subject: |
[PULL 01/17] target/i386: Remove LBREn bit check when access Arch LBR MSRs |
Date: |
Wed, 25 May 2022 21:28:36 +0200 |
From: Yang Weijiang <weijiang.yang@intel.com>
Live migration can happen when Arch LBR LBREn bit is cleared,
e.g., when migration happens after guest entered SMM mode.
In this case, we still need to migrate Arch LBR MSRs.
Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
Message-Id: <20220517155024.33270-1-weijiang.yang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/kvm/kvm.c | 21 +++++++++------------
1 file changed, 9 insertions(+), 12 deletions(-)
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index a9ee8eebd7..e2d675115b 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -3373,15 +3373,14 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
int i, ret;
/*
- * Only migrate Arch LBR states when: 1) Arch LBR is enabled
- * for migrated vcpu. 2) the host Arch LBR depth equals that
- * of source guest's, this is to avoid mismatch of guest/host
- * config for the msr hence avoid unexpected misbehavior.
+ * Only migrate Arch LBR states when the host Arch LBR depth
+ * equals that of source guest's, this is to avoid mismatch
+ * of guest/host config for the msr hence avoid unexpected
+ * misbehavior.
*/
ret = kvm_get_one_msr(cpu, MSR_ARCH_LBR_DEPTH, &depth);
- if (ret == 1 && (env->msr_lbr_ctl & 0x1) && !!depth &&
- depth == env->msr_lbr_depth) {
+ if (ret == 1 && !!depth && depth == env->msr_lbr_depth) {
kvm_msr_entry_add(cpu, MSR_ARCH_LBR_CTL, env->msr_lbr_ctl);
kvm_msr_entry_add(cpu, MSR_ARCH_LBR_DEPTH, env->msr_lbr_depth);
@@ -3801,13 +3800,11 @@ static int kvm_get_msrs(X86CPU *cpu)
if (kvm_enabled() && cpu->enable_pmu &&
(env->features[FEAT_7_0_EDX] & CPUID_7_0_EDX_ARCH_LBR)) {
- uint64_t ctl, depth;
- int i, ret2;
+ uint64_t depth;
+ int i, ret;
- ret = kvm_get_one_msr(cpu, MSR_ARCH_LBR_CTL, &ctl);
- ret2 = kvm_get_one_msr(cpu, MSR_ARCH_LBR_DEPTH, &depth);
- if (ret == 1 && ret2 == 1 && (ctl & 0x1) &&
- depth == ARCH_LBR_NR_ENTRIES) {
+ ret = kvm_get_one_msr(cpu, MSR_ARCH_LBR_DEPTH, &depth);
+ if (ret == 1 && depth == ARCH_LBR_NR_ENTRIES) {
kvm_msr_entry_add(cpu, MSR_ARCH_LBR_CTL, 0);
kvm_msr_entry_add(cpu, MSR_ARCH_LBR_DEPTH, 0);
--
2.36.1
- [PULL 00/17] Misc patches for 2022-05-25, Paolo Bonzini, 2022/05/25
- [PULL 01/17] target/i386: Remove LBREn bit check when access Arch LBR MSRs,
Paolo Bonzini <=
- [PULL 02/17] hostmem: default the amount of prealloc-threads to smp-cpus, Paolo Bonzini, 2022/05/25
- [PULL 03/17] thread-pool: optimize scheduling of completion bottom half, Paolo Bonzini, 2022/05/25
- [PULL 04/17] thread-pool: replace semaphore with condition variable, Paolo Bonzini, 2022/05/25
- [PULL 05/17] thread-pool: remove stopping variable, Paolo Bonzini, 2022/05/25
- [PULL 06/17] contrib/elf2dmp: add ELF dump header checking, Paolo Bonzini, 2022/05/25
- [PULL 08/17] hw/audio/ac97: Remove unimplemented reset functions, Paolo Bonzini, 2022/05/25
- [PULL 07/17] hw/audio/ac97: Coding style fixes to avoid checkpatch errors, Paolo Bonzini, 2022/05/25
- [PULL 09/17] hw/audio/ac97: Remove unneeded local variables, Paolo Bonzini, 2022/05/25
- [PULL 10/17] target/i386/kvm: Fix disabling MPX on "-cpu host" with MPX-capable host, Paolo Bonzini, 2022/05/25
- [PULL 11/17] ide_ioport_read: Return lower octet of data register instead of 0xFF, Paolo Bonzini, 2022/05/25