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Re: [PATCH] target/mips: Fix store adress of high 64bit in helper_msa_st


From: Philippe Mathieu-Daudé
Subject: Re: [PATCH] target/mips: Fix store adress of high 64bit in helper_msa_st_b()
Date: Mon, 30 May 2022 16:17:37 +0200
User-agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.9.1

On 4/5/22 04:33, nihui wrote:
This patch fix the issue that helper_msa_st_b() write high 64bit
data to where the low 64bit resides, leaving high 64bit undefined.

Signed-off-by: Ni Hui <shuizhuyuanluo@126.com>
---
  target/mips/tcg/msa_helper.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/mips/tcg/msa_helper.c b/target/mips/tcg/msa_helper.c
index 4dde5d639a..736283e2af 100644
--- a/target/mips/tcg/msa_helper.c
+++ b/target/mips/tcg/msa_helper.c
@@ -8329,7 +8329,7 @@ void helper_msa_st_b(CPUMIPSState *env, uint32_t wd,
/* Store 8 bytes at a time. Vector element ordering makes this LE. */
      cpu_stq_le_data_ra(env, addr + 0, pwd->d[0], ra);
-    cpu_stq_le_data_ra(env, addr + 0, pwd->d[1], ra);
+    cpu_stq_le_data_ra(env, addr + 8, pwd->d[1], ra);
  }
void helper_msa_st_h(CPUMIPSState *env, uint32_t wd,

Fixes: 68ad9260e0 ("target/mips: Use 8-byte memory ops for msa load/store")

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Queued to mips-next.



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