[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 060/117] target/arm: Move sve zip high_ofs into simd_data
From: |
Peter Maydell |
Subject: |
[PULL 060/117] target/arm: Move sve zip high_ofs into simd_data |
Date: |
Mon, 30 May 2022 17:06:11 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
This is in line with how we treat uzp, and will
eliminate the special case code during translation.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-58-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/sve_helper.c | 6 ++++--
target/arm/translate-sve.c | 12 ++++++------
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
index e0f9aa9983c..3bdcd4ce9d0 100644
--- a/target/arm/sve_helper.c
+++ b/target/arm/sve_helper.c
@@ -3382,6 +3382,7 @@ void HELPER(sve_punpk_p)(void *vd, void *vn, uint32_t
pred_desc)
void HELPER(NAME)(void *vd, void *vn, void *vm, uint32_t desc) \
{ \
intptr_t oprsz = simd_oprsz(desc); \
+ intptr_t odd_ofs = simd_data(desc); \
intptr_t i, oprsz_2 = oprsz / 2; \
ARMVectorReg tmp_n, tmp_m; \
/* We produce output faster than we consume input. \
@@ -3393,8 +3394,9 @@ void HELPER(NAME)(void *vd, void *vn, void *vm, uint32_t
desc) \
vm = memcpy(&tmp_m, vm, oprsz_2); \
} \
for (i = 0; i < oprsz_2; i += sizeof(TYPE)) { \
- *(TYPE *)(vd + H(2 * i + 0)) = *(TYPE *)(vn + H(i)); \
- *(TYPE *)(vd + H(2 * i + sizeof(TYPE))) = *(TYPE *)(vm + H(i)); \
+ *(TYPE *)(vd + H(2 * i + 0)) = *(TYPE *)(vn + odd_ofs + H(i)); \
+ *(TYPE *)(vd + H(2 * i + sizeof(TYPE))) = \
+ *(TYPE *)(vm + odd_ofs + H(i)); \
} \
if (sizeof(TYPE) == 16 && unlikely(oprsz & 16)) { \
memset(vd + oprsz - 16, 0, 16); \
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 1e6bcedb9df..c2ced3e2bb1 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -2298,9 +2298,9 @@ static bool do_zip(DisasContext *s, arg_rrr_esz *a, bool
high)
unsigned vsz = vec_full_reg_size(s);
unsigned high_ofs = high ? vsz / 2 : 0;
tcg_gen_gvec_3_ool(vec_full_reg_offset(s, a->rd),
- vec_full_reg_offset(s, a->rn) + high_ofs,
- vec_full_reg_offset(s, a->rm) + high_ofs,
- vsz, vsz, 0, fns[a->esz]);
+ vec_full_reg_offset(s, a->rn),
+ vec_full_reg_offset(s, a->rm),
+ vsz, vsz, high_ofs, fns[a->esz]);
}
return true;
}
@@ -2324,9 +2324,9 @@ static bool do_zip_q(DisasContext *s, arg_rrr_esz *a,
bool high)
unsigned vsz = vec_full_reg_size(s);
unsigned high_ofs = high ? QEMU_ALIGN_DOWN(vsz, 32) / 2 : 0;
tcg_gen_gvec_3_ool(vec_full_reg_offset(s, a->rd),
- vec_full_reg_offset(s, a->rn) + high_ofs,
- vec_full_reg_offset(s, a->rm) + high_ofs,
- vsz, vsz, 0, gen_helper_sve2_zip_q);
+ vec_full_reg_offset(s, a->rn),
+ vec_full_reg_offset(s, a->rm),
+ vsz, vsz, high_ofs, gen_helper_sve2_zip_q);
}
return true;
}
--
2.25.1
- [PULL 067/117] target/arm: Use TRANS_FEAT for do_last_general, (continued)
- [PULL 067/117] target/arm: Use TRANS_FEAT for do_last_general, Peter Maydell, 2022/05/30
- [PULL 069/117] target/arm: Use TRANS_FEAT for do_ppzz_flags, Peter Maydell, 2022/05/30
- [PULL 077/117] target/arm: Use TRANS_FEAT for ADD_zzi, Peter Maydell, 2022/05/30
- [PULL 088/117] target/arm: Rename do_zzz_fp to gen_gvec_ool_fpst_arg_zzz, Peter Maydell, 2022/05/30
- [PULL 091/117] target/arm: Use TRANS_FEAT for FTMAD, Peter Maydell, 2022/05/30
- [PULL 093/117] target/arm: Use TRANS_FEAT for do_reduce, Peter Maydell, 2022/05/30
- [PULL 058/117] target/arm: Use TRANS_FEAT for do_perm_pred3, Peter Maydell, 2022/05/30
- [PULL 090/117] target/arm: Use TRANS_FEAT for FMUL_zzx, Peter Maydell, 2022/05/30
- [PULL 046/117] target/arm: Use TRANS_FEAT for do_vpz_ool, Peter Maydell, 2022/05/30
- [PULL 052/117] target/arm: Use TRANS_FEAT for do_index, Peter Maydell, 2022/05/30
- [PULL 060/117] target/arm: Move sve zip high_ofs into simd_data,
Peter Maydell <=
- [PULL 061/117] target/arm: Use gen_gvec_ool_arg_zzz for do_zip, do_zip_q, Peter Maydell, 2022/05/30
- [PULL 070/117] target/arm: Use TRANS_FEAT for do_sve2_ppzz_flags, Peter Maydell, 2022/05/30
- [PULL 073/117] target/arm: Use TRANS_FEAT for MUL_zzi, Peter Maydell, 2022/05/30
- [PULL 074/117] target/arm: Reject dup_i w/ shifted byte early, Peter Maydell, 2022/05/30
- [PULL 094/117] target/arm: Use TRANS_FEAT for FRECPE, FRSQRTE, Peter Maydell, 2022/05/30
- [PULL 095/117] target/arm: Expand frint_fns for MO_8, Peter Maydell, 2022/05/30
- [PULL 096/117] target/arm: Rename do_zpz_ptr to gen_gvec_ool_fpst_arg_zpz, Peter Maydell, 2022/05/30
- [PULL 082/117] target/arm: Move sve check into gen_gvec_fn_ppp, Peter Maydell, 2022/05/30
- [PULL 084/117] target/arm: Use TRANS_FEAT for SEL_zpzz, Peter Maydell, 2022/05/30
- [PULL 086/117] target/arm: Use TRANS_FEAT for FMLA, Peter Maydell, 2022/05/30