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[PATCH v2 8/8] target/i386/intel-pt: Access MSR_IA32_RTIT_ADDRn based on
From: |
Xiaoyao Li |
Subject: |
[PATCH v2 8/8] target/i386/intel-pt: Access MSR_IA32_RTIT_ADDRn based on guest CPUID configuration |
Date: |
Mon, 8 Aug 2022 16:58:34 +0800 |
KVM only allows userspace to access legal number of MSR_IA32_RTIT_ADDRn,
which is enumrated by guest's CPUID(0x14,0x1):EAX[2:0], i.e.,
env->features[FEAT_14_1_EAX] & INTEL_PT_ADDR_RANGES_NUM_MASK
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
target/i386/cpu.h | 2 ++
target/i386/kvm/kvm.c | 8 ++++----
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 797f384e3fc4..34c59942b1fa 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -939,6 +939,8 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
/* Packets which contain IP payload have LIP values */
#define CPUID_14_0_ECX_LIP (1U << 31)
+#define INTEL_PT_ADDR_RANGES_NUM_MASK 0x7
+
/* CLZERO instruction */
#define CPUID_8000_0008_EBX_CLZERO (1U << 0)
/* Always save/restore FP error pointers */
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index f148a6d52fa4..613d843bf5a4 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -3365,8 +3365,8 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
}
}
if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT) {
- int addr_num = kvm_arch_get_supported_cpuid(kvm_state,
- 0x14, 1, R_EAX) & 0x7;
+ int addr_num = env->features[FEAT_14_1_EAX] &
+ INTEL_PT_ADDR_RANGES_NUM_MASK;
kvm_msr_entry_add(cpu, MSR_IA32_RTIT_CTL,
env->msr_rtit_ctrl);
@@ -3808,8 +3808,8 @@ static int kvm_get_msrs(X86CPU *cpu)
}
if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT) {
- int addr_num =
- kvm_arch_get_supported_cpuid(kvm_state, 0x14, 1, R_EAX) & 0x7;
+ int addr_num = env->features[FEAT_14_1_EAX] &
+ INTEL_PT_ADDR_RANGES_NUM_MASK;
kvm_msr_entry_add(cpu, MSR_IA32_RTIT_CTL, 0);
kvm_msr_entry_add(cpu, MSR_IA32_RTIT_STATUS, 0);
--
2.27.0
- [PATCH v2 0/8] Make Intel PT configurable, Xiaoyao Li, 2022/08/08
- [PATCH v2 1/8] target/i386: Print CPUID subleaf info for unsupported feature, Xiaoyao Li, 2022/08/08
- [PATCH v2 2/8] target/i386/intel-pt: Fix INTEL_PT_ADDR_RANGES_NUM_MASK, Xiaoyao Li, 2022/08/08
- [PATCH v2 3/8] target/i386/intel-pt: Introduce FeatureWordInfo for Intel PT CPUID leaf 0xD, Xiaoyao Li, 2022/08/08
- [PATCH v2 5/8] target/i386/intel-pt: Rework/rename the default INTEL-PT feature set, Xiaoyao Li, 2022/08/08
- [PATCH v2 4/8] target/i386/intel-pt: print special message for INTEL_PT_ADDR_RANGES_NUM, Xiaoyao Li, 2022/08/08
- [PATCH v2 6/8] target/i386/intel-pt: Enable host pass through of Intel PT, Xiaoyao Li, 2022/08/08
- [PATCH v2 8/8] target/i386/intel-pt: Access MSR_IA32_RTIT_ADDRn based on guest CPUID configuration,
Xiaoyao Li <=
- [PATCH v2 7/8] target/i386/intel-pt: Define specific PT feature set for IceLake-server and Snowridge, Xiaoyao Li, 2022/08/08