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[PATCH v2 7/8] target/i386/intel-pt: Define specific PT feature set for
From: |
Xiaoyao Li |
Subject: |
[PATCH v2 7/8] target/i386/intel-pt: Define specific PT feature set for IceLake-server and Snowridge |
Date: |
Mon, 8 Aug 2022 16:58:33 +0800 |
For IceLake-server, it's just the same as using the default PT
feature set since the default one is exact taken from ICX.
For Snowridge, define it according to real SNR silicon capabilities.
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
---
target/i386/cpu.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 2664b527b8e8..3fc5305aa9dd 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3456,6 +3456,14 @@ static const X86CPUDefinition builtin_x86_defs[] = {
.features[FEAT_6_EAX] =
CPUID_6_EAX_ARAT,
/* Missing: Mode-based execute control (XS/XU), processor tracing, TSC
scaling */
+ .features[FEAT_14_0_EBX] =
+ CPUID_14_0_EBX_CR3_FILTER | CPUID_14_0_EBX_PSB |
+ CPUID_14_0_EBX_IP_FILTER | CPUID_14_0_EBX_MTC,
+ .features[FEAT_14_0_ECX] =
+ CPUID_14_0_ECX_TOPA | CPUID_14_0_ECX_MULTI_ENTRIES |
+ CPUID_14_0_ECX_SINGLE_RANGE,
+ .features[FEAT_14_1_EAX] = 0x249 << 16 | 0x2,
+ .features[FEAT_14_1_EBX] = 0x003f << 16 | 0x1fff,
.features[FEAT_VMX_BASIC] = MSR_VMX_BASIC_INS_OUTS |
MSR_VMX_BASIC_TRUE_CTLS,
.features[FEAT_VMX_ENTRY_CTLS] = VMX_VM_ENTRY_IA32E_MODE |
@@ -3733,6 +3741,16 @@ static const X86CPUDefinition builtin_x86_defs[] = {
CPUID_XSAVE_XGETBV1,
.features[FEAT_6_EAX] =
CPUID_6_EAX_ARAT,
+ .features[FEAT_14_0_EBX] =
+ CPUID_14_0_EBX_CR3_FILTER | CPUID_14_0_EBX_PSB |
+ CPUID_14_0_EBX_IP_FILTER | CPUID_14_0_EBX_MTC |
+ CPUID_14_0_EBX_PTWRITE | CPUID_14_0_EBX_POWER_EVENT |
+ CPUID_14_0_EBX_PSB_PMI_PRESERVATION,
+ .features[FEAT_14_0_ECX] =
+ CPUID_14_0_ECX_TOPA | CPUID_14_0_ECX_MULTI_ENTRIES |
+ CPUID_14_0_ECX_SINGLE_RANGE | CPUID_14_0_ECX_LIP,
+ .features[FEAT_14_1_EAX] = 0x249 << 16 | 0x2,
+ .features[FEAT_14_1_EBX] = 0x003f << 16 | 0xffff,
.features[FEAT_VMX_BASIC] = MSR_VMX_BASIC_INS_OUTS |
MSR_VMX_BASIC_TRUE_CTLS,
.features[FEAT_VMX_ENTRY_CTLS] = VMX_VM_ENTRY_IA32E_MODE |
--
2.27.0
- [PATCH v2 0/8] Make Intel PT configurable, Xiaoyao Li, 2022/08/08
- [PATCH v2 1/8] target/i386: Print CPUID subleaf info for unsupported feature, Xiaoyao Li, 2022/08/08
- [PATCH v2 2/8] target/i386/intel-pt: Fix INTEL_PT_ADDR_RANGES_NUM_MASK, Xiaoyao Li, 2022/08/08
- [PATCH v2 3/8] target/i386/intel-pt: Introduce FeatureWordInfo for Intel PT CPUID leaf 0xD, Xiaoyao Li, 2022/08/08
- [PATCH v2 5/8] target/i386/intel-pt: Rework/rename the default INTEL-PT feature set, Xiaoyao Li, 2022/08/08
- [PATCH v2 4/8] target/i386/intel-pt: print special message for INTEL_PT_ADDR_RANGES_NUM, Xiaoyao Li, 2022/08/08
- [PATCH v2 6/8] target/i386/intel-pt: Enable host pass through of Intel PT, Xiaoyao Li, 2022/08/08
- [PATCH v2 8/8] target/i386/intel-pt: Access MSR_IA32_RTIT_ADDRn based on guest CPUID configuration, Xiaoyao Li, 2022/08/08
- [PATCH v2 7/8] target/i386/intel-pt: Define specific PT feature set for IceLake-server and Snowridge,
Xiaoyao Li <=