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[PATCH v1 5/8] ssi: cache SSIPeripheralClass to avoid GET_CLASS()
From: |
Alex Bennée |
Subject: |
[PATCH v1 5/8] ssi: cache SSIPeripheralClass to avoid GET_CLASS() |
Date: |
Thu, 11 Aug 2022 16:14:10 +0100 |
Investigating why some BMC models are so slow compared to a plain ARM
virt machines I did some profiling of:
./qemu-system-arm -M romulus-bmc -nic user \
-drive
file=obmc-phosphor-image-romulus.static.mtd,format=raw,if=mtd \
-nographic -serial mon:stdio
And saw that object_class_dynamic_cast_assert was dominating the
profile times. We have a number of cases in this model of the SSI bus.
As the class is static once the object is created we just cache it and
use it instead of the dynamic case macros.
Profiling against:
./tests/venv/bin/avocado run \
tests/avocado/machine_aspeed.py:test_arm_ast2500_romulus_openbmc_v2_9_0
Before: 35.565 s ± 0.087 s
After: 15.713 s ± 0.287 s
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Cédric Le Goater <clg@kaod.org>
---
v2
- split patches
---
include/hw/ssi/ssi.h | 3 +++
hw/ssi/ssi.c | 18 ++++++++----------
2 files changed, 11 insertions(+), 10 deletions(-)
diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h
index f411858ab0..6950f86810 100644
--- a/include/hw/ssi/ssi.h
+++ b/include/hw/ssi/ssi.h
@@ -59,6 +59,9 @@ struct SSIPeripheralClass {
struct SSIPeripheral {
DeviceState parent_obj;
+ /* cache the class */
+ SSIPeripheralClass *spc;
+
/* Chip select state */
bool cs;
};
diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c
index 003931fb50..d54a109bee 100644
--- a/hw/ssi/ssi.c
+++ b/hw/ssi/ssi.c
@@ -38,9 +38,8 @@ static void ssi_cs_default(void *opaque, int n, int level)
bool cs = !!level;
assert(n == 0);
if (s->cs != cs) {
- SSIPeripheralClass *ssc = SSI_PERIPHERAL_GET_CLASS(s);
- if (ssc->set_cs) {
- ssc->set_cs(s, cs);
+ if (s->spc->set_cs) {
+ s->spc->set_cs(s, cs);
}
}
s->cs = cs;
@@ -48,11 +47,11 @@ static void ssi_cs_default(void *opaque, int n, int level)
static uint32_t ssi_transfer_raw_default(SSIPeripheral *dev, uint32_t val)
{
- SSIPeripheralClass *ssc = SSI_PERIPHERAL_GET_CLASS(dev);
+ SSIPeripheralClass *ssc = dev->spc;
if ((dev->cs && ssc->cs_polarity == SSI_CS_HIGH) ||
- (!dev->cs && ssc->cs_polarity == SSI_CS_LOW) ||
- ssc->cs_polarity == SSI_CS_NONE) {
+ (!dev->cs && ssc->cs_polarity == SSI_CS_LOW) ||
+ ssc->cs_polarity == SSI_CS_NONE) {
return ssc->transfer(dev, val);
}
return 0;
@@ -67,6 +66,7 @@ static void ssi_peripheral_realize(DeviceState *dev, Error
**errp)
ssc->cs_polarity != SSI_CS_NONE) {
qdev_init_gpio_in_named(dev, ssi_cs_default, SSI_GPIO_CS, 1);
}
+ s->spc = ssc;
ssc->realize(s, errp);
}
@@ -115,13 +115,11 @@ uint32_t ssi_transfer(SSIBus *bus, uint32_t val)
{
BusState *b = BUS(bus);
BusChild *kid;
- SSIPeripheralClass *ssc;
uint32_t r = 0;
QTAILQ_FOREACH(kid, &b->children, sibling) {
- SSIPeripheral *peripheral = SSI_PERIPHERAL(kid->child);
- ssc = SSI_PERIPHERAL_GET_CLASS(peripheral);
- r |= ssc->transfer_raw(peripheral, val);
+ SSIPeripheral *p = SSI_PERIPHERAL(kid->child);
+ r |= p->spc->transfer_raw(p, val);
}
return r;
--
2.30.2
- [PATCH v1 4/8] cputlb: used cached CPUClass in our hot-paths, (continued)
- [PATCH v1 4/8] cputlb: used cached CPUClass in our hot-paths, Alex Bennée, 2022/08/11
- [PATCH v1 3/8] hw/core/cpu-sysemu: used cached class in cpu_asidx_from_attrs, Alex Bennée, 2022/08/11
- [PATCH v1 7/8] tests/avocado: apply a band aid to aspeed-evb login, Alex Bennée, 2022/08/11
- [PATCH v1 2/8] cpu: cache CPUClass in CPUState for hot code paths, Alex Bennée, 2022/08/11
- [PATCH v1 5/8] ssi: cache SSIPeripheralClass to avoid GET_CLASS(),
Alex Bennée <=
- [PATCH v1 1/8] linux-user: un-parent OBJECT(cpu) when closing thread, Alex Bennée, 2022/08/11
- [PATCH v1 6/8] tests/avocado: add timeout to the aspeed tests, Alex Bennée, 2022/08/11
- [PATCH v1 8/8] accel/tcg: remove trace_vcpu_dstate TB checking, Alex Bennée, 2022/08/11
- Re: [PATCH for 7.1 v1 0/8] memory leaks and speed tweaks, Peter Maydell, 2022/08/11