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[PATCH 10/10] target/arm: Report FEAT_PMUv3p5 for TCG '-cpu max'
From: |
Peter Maydell |
Subject: |
[PATCH 10/10] target/arm: Report FEAT_PMUv3p5 for TCG '-cpu max' |
Date: |
Thu, 11 Aug 2022 18:16:19 +0100 |
Update the ID registers for TCG's '-cpu max' to report a FEAT_PMUv3p5
compliant PMU.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu64.c | 2 +-
target/arm/cpu_tcg.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 78e27f778ac..fa4b0152706 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -1072,7 +1072,7 @@ static void aarch64_max_initfn(Object *obj)
t = cpu->isar.id_aa64dfr0;
t = FIELD_DP64(t, ID_AA64DFR0, DEBUGVER, 9); /* FEAT_Debugv8p4 */
- t = FIELD_DP64(t, ID_AA64DFR0, PMUVER, 5); /* FEAT_PMUv3p4 */
+ t = FIELD_DP64(t, ID_AA64DFR0, PMUVER, 6); /* FEAT_PMUv3p5 */
cpu->isar.id_aa64dfr0 = t;
t = cpu->isar.id_aa64smfr0;
diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
index 3099b38e32b..4c71a0b612d 100644
--- a/target/arm/cpu_tcg.c
+++ b/target/arm/cpu_tcg.c
@@ -81,7 +81,7 @@ void aa32_max_features(ARMCPU *cpu)
t = cpu->isar.id_dfr0;
t = FIELD_DP32(t, ID_DFR0, COPDBG, 9); /* FEAT_Debugv8p4 */
t = FIELD_DP32(t, ID_DFR0, COPSDBG, 9); /* FEAT_Debugv8p4 */
- t = FIELD_DP32(t, ID_DFR0, PERFMON, 5); /* FEAT_PMUv3p4 */
+ t = FIELD_DP32(t, ID_DFR0, PERFMON, 6); /* FEAT_PMUv3p5 */
cpu->isar.id_dfr0 = t;
}
--
2.25.1
- [PATCH 08/10] target/arm: Implement FEAT_PMUv3p5 cycle counter disable bits, (continued)
- [PATCH 08/10] target/arm: Implement FEAT_PMUv3p5 cycle counter disable bits, Peter Maydell, 2022/08/11
- [PATCH 05/10] target/arm: Honour MDCR_EL2.HPMD in Secure EL2, Peter Maydell, 2022/08/11
- [PATCH 04/10] target/arm: Ignore PMCR.D when PMCR.LC is set, Peter Maydell, 2022/08/11
- [PATCH 07/10] target/arm: Rename pmu_8_n feature test functions, Peter Maydell, 2022/08/11
- [PATCH 10/10] target/arm: Report FEAT_PMUv3p5 for TCG '-cpu max',
Peter Maydell <=
- [PATCH 09/10] target/arm: Support 64-bit event counters for FEAT_PMUv3p5, Peter Maydell, 2022/08/11