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[PATCH 10/17] target/i386: add 48-4f, 58-5f opcodes
From: |
Paolo Bonzini |
Subject: |
[PATCH 10/17] target/i386: add 48-4f, 58-5f opcodes |
Date: |
Wed, 24 Aug 2022 19:32:43 +0200 |
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/tcg/decode-new.c.inc | 16 ++++++++++++++++
target/i386/tcg/decode-old.c.inc | 2 +-
target/i386/tcg/emit.c.inc | 5 +++++
3 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index bbd6ef07a1..586894e4ee 100644
--- a/target/i386/tcg/decode-new.c.inc
+++ b/target/i386/tcg/decode-new.c.inc
@@ -587,8 +587,24 @@ static X86OpEntry A2_08_FF[16][8] = {
X86_OP_ENTRY0(AAS, i64),
},
{
+ X86_OP_ENTRY1(DEC, 0,v, i64),
+ X86_OP_ENTRY1(DEC, 1,v, i64),
+ X86_OP_ENTRY1(DEC, 2,v, i64),
+ X86_OP_ENTRY1(DEC, 3,v, i64),
+ X86_OP_ENTRY1(DEC, 4,v, i64),
+ X86_OP_ENTRY1(DEC, 5,v, i64),
+ X86_OP_ENTRY1(DEC, 6,v, i64),
+ X86_OP_ENTRY1(DEC, 7,v, i64),
},
{
+ X86_OP_ENTRYw(POP, LoBits,d64),
+ X86_OP_ENTRYw(POP, LoBits,d64),
+ X86_OP_ENTRYw(POP, LoBits,d64),
+ X86_OP_ENTRYw(POP, LoBits,d64),
+ X86_OP_ENTRYw(POP, LoBits,d64),
+ X86_OP_ENTRYw(POP, LoBits,d64),
+ X86_OP_ENTRYw(POP, LoBits,d64),
+ X86_OP_ENTRYw(POP, LoBits,d64),
},
{
},
diff --git a/target/i386/tcg/decode-old.c.inc b/target/i386/tcg/decode-old.c.inc
index 28edb62b5b..a297d126a4 100644
--- a/target/i386/tcg/decode-old.c.inc
+++ b/target/i386/tcg/decode-old.c.inc
@@ -1821,7 +1821,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState
*cpu)
#else
use_new &= b <= limit;
#endif
- if (use_new && b <= 0x3f) {
+ if (use_new && b <= 0x5f) {
return disas_insn_new(s, cpu, b);
}
case 0x0f:
diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index d3d0f893fb..a76d6820e1 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/target/i386/tcg/emit.c.inc
@@ -191,6 +191,11 @@ static void gen_DAS(DisasContext *s, CPUX86State *env,
X86DecodedInsn *decode)
set_cc_op(s, CC_OP_EFLAGS);
}
+static void gen_DEC(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
+{
+ gen_alu_op(s, OP_DECL, decode->op[0].ot);
+}
+
static void gen_INC(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
{
gen_alu_op(s, OP_INCL, decode->op[0].ot);
--
2.37.1
- Re: [PATCH 04/17] target/i386: add ALU load/writeback core, (continued)
- [PATCH 03/17] target/i386: add core of new i386 decoder, Paolo Bonzini, 2022/08/24
- [PATCH 01/17] target/i386: extract old decoder to a separate file, Paolo Bonzini, 2022/08/24
- [PATCH 08/17] target/i386: add 28-2f, 38-3f opcodes, Paolo Bonzini, 2022/08/24
- [PATCH 13/17] target/i386: add 80-87, 90-97 opcodes, Paolo Bonzini, 2022/08/24
- [PATCH 10/17] target/i386: add 48-4f, 58-5f opcodes,
Paolo Bonzini <=
- [PATCH 11/17] target/i386: add 60-67, 70-77 opcodes, Paolo Bonzini, 2022/08/24
- [PATCH 09/17] target/i386: add 40-47, 50-57 opcodes, Paolo Bonzini, 2022/08/24
- [PATCH 17/17] target/i386: add a8-af, b8-bf opcodes, Paolo Bonzini, 2022/08/24
- [PATCH 07/17] target/i386: add 20-27, 30-37 opcodes, Paolo Bonzini, 2022/08/24
- [PATCH 12/17] target/i386: add 68-6f, 78-7f opcodes, Paolo Bonzini, 2022/08/24
- [PATCH 15/17] target/i386: do not clobber A0 in POP translation, Paolo Bonzini, 2022/08/24
- [PATCH 14/17] target/i386: add a0-a7, b0-b7 opcodes, Paolo Bonzini, 2022/08/24