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[PATCH 14/17] target/i386: add a0-a7, b0-b7 opcodes
From: |
Paolo Bonzini |
Subject: |
[PATCH 14/17] target/i386: add a0-a7, b0-b7 opcodes |
Date: |
Wed, 24 Aug 2022 19:32:47 +0200 |
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
target/i386/tcg/decode-new.c.inc | 16 ++++++++++++++++
target/i386/tcg/emit.c.inc | 22 ++++++++++++++++++++++
2 files changed, 38 insertions(+)
diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index 07a2aea540..3d96ac3adb 100644
--- a/target/i386/tcg/decode-new.c.inc
+++ b/target/i386/tcg/decode-new.c.inc
@@ -592,8 +592,24 @@ static X86OpEntry A2_00_F7[16][8] = {
X86_OP_ENTRY2(XCHG, 0,v, LoBits,v),
},
{
+ X86_OP_ENTRY3(MOV, 0,b, O,b, None, None), /* AL, Ob */
+ X86_OP_ENTRY3(MOV, 0,v, O,v, None, None), /* rAX, Ov */
+ X86_OP_ENTRY3(MOV, O,b, 0,b, None, None), /* Ob, AL */
+ X86_OP_ENTRY3(MOV, O,v, 0,v, None, None), /* Ov, rAX */
+ X86_OP_ENTRY2(MOVS, Y,b, X,b),
+ X86_OP_ENTRY2(MOVS, Y,v, X,v),
+ X86_OP_ENTRY2(CMPS, Y,b, X,b),
+ X86_OP_ENTRY2(CMPS, Y,v, X,v),
},
{
+ X86_OP_ENTRY3(MOV, LoBits,b, I,b, None, None),
+ X86_OP_ENTRY3(MOV, LoBits,b, I,b, None, None),
+ X86_OP_ENTRY3(MOV, LoBits,b, I,b, None, None),
+ X86_OP_ENTRY3(MOV, LoBits,b, I,b, None, None),
+ X86_OP_ENTRY3(MOV, LoBits,b, I,b, None, None),
+ X86_OP_ENTRY3(MOV, LoBits,b, I,b, None, None),
+ X86_OP_ENTRY3(MOV, LoBits,b, I,b, None, None),
+ X86_OP_ENTRY3(MOV, LoBits,b, I,b, None, None),
},
{
},
diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index 80f6541464..9395474302 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/target/i386/tcg/emit.c.inc
@@ -227,6 +227,18 @@ static void gen_BOUND(DisasContext *s, CPUX86State *env,
X86DecodedInsn *decode)
}
}
+static void gen_CMPS(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
+{
+ MemOp ot = decode->op[0].ot;
+ if (s->prefix & PREFIX_REPNZ) {
+ gen_repz_cmps(s, ot, s->pc_start - s->cs_base, s->pc - s->cs_base, 1);
+ } else if (s->prefix & PREFIX_REPZ) {
+ gen_repz_cmps(s, ot, s->pc_start - s->cs_base, s->pc - s->cs_base, 0);
+ } else {
+ gen_cmps(s, ot);
+ }
+}
+
static void gen_DAA(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
{
gen_update_cc_op(s);
@@ -327,6 +339,16 @@ static void gen_MOV(DisasContext *s, CPUX86State *env,
X86DecodedInsn *decode)
}
#define gen_NOP gen_MOV
+static void gen_MOVS(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
+{
+ MemOp ot = decode->op[0].ot;
+ if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
+ gen_repz_movs(s, ot, s->pc_start - s->cs_base, s->pc - s->cs_base);
+ } else {
+ gen_movs(s, ot);
+ }
+}
+
static void gen_MOVSXD(DisasContext *s, CPUX86State *env, X86DecodedInsn
*decode)
{
tcg_gen_ext32s_tl(s->T0, s->T0);
--
2.37.1
- [PATCH 13/17] target/i386: add 80-87, 90-97 opcodes, (continued)
- [PATCH 13/17] target/i386: add 80-87, 90-97 opcodes, Paolo Bonzini, 2022/08/24
- [PATCH 10/17] target/i386: add 48-4f, 58-5f opcodes, Paolo Bonzini, 2022/08/24
- [PATCH 11/17] target/i386: add 60-67, 70-77 opcodes, Paolo Bonzini, 2022/08/24
- [PATCH 09/17] target/i386: add 40-47, 50-57 opcodes, Paolo Bonzini, 2022/08/24
- [PATCH 17/17] target/i386: add a8-af, b8-bf opcodes, Paolo Bonzini, 2022/08/24
- [PATCH 07/17] target/i386: add 20-27, 30-37 opcodes, Paolo Bonzini, 2022/08/24
- [PATCH 12/17] target/i386: add 68-6f, 78-7f opcodes, Paolo Bonzini, 2022/08/24
- [PATCH 15/17] target/i386: do not clobber A0 in POP translation, Paolo Bonzini, 2022/08/24
- [PATCH 14/17] target/i386: add a0-a7, b0-b7 opcodes,
Paolo Bonzini <=
- [PATCH 16/17] target/i386: add 88-8f, 98-9f opcodes, Paolo Bonzini, 2022/08/24
- Re: [RFC PATCH 00/17] (The beginning of) a new i386 decoder, Richard Henderson, 2022/08/24