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[PULL 12/60] ppc/pnv: remove pnv-phb3-root-port
From: |
Daniel Henrique Barboza |
Subject: |
[PULL 12/60] ppc/pnv: remove pnv-phb3-root-port |
Date: |
Wed, 31 Aug 2022 15:49:46 -0300 |
The unified pnv-phb-root-port can be used in its place. There is no ABI
breakage in doing so because no official QEMU release introduced user
creatable pnv-phb3-root-port devices.
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <20220624084921.399219-8-danielhb413@gmail.com>
---
hw/pci-host/pnv_phb.c | 2 +-
hw/pci-host/pnv_phb3.c | 42 ----------------------------------
hw/ppc/pnv.c | 1 +
include/hw/pci-host/pnv_phb3.h | 6 -----
4 files changed, 2 insertions(+), 49 deletions(-)
diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c
index 5e61f85614..cdddc6a389 100644
--- a/hw/pci-host/pnv_phb.c
+++ b/hw/pci-host/pnv_phb.c
@@ -34,7 +34,7 @@ static void pnv_phb_realize(DeviceState *dev, Error **errp)
switch (phb->version) {
case 3:
phb_typename = g_strdup(TYPE_PNV_PHB3);
- phb_rootport_typename = g_strdup(TYPE_PNV_PHB3_ROOT_PORT);
+ phb_rootport_typename = g_strdup(TYPE_PNV_PHB_ROOT_PORT);
break;
case 4:
phb_typename = g_strdup(TYPE_PNV_PHB4);
diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
index ad9e983fe9..d4c04a281a 100644
--- a/hw/pci-host/pnv_phb3.c
+++ b/hw/pci-host/pnv_phb3.c
@@ -1122,51 +1122,9 @@ static const TypeInfo pnv_phb3_root_bus_info = {
.class_init = pnv_phb3_root_bus_class_init,
};
-static void pnv_phb3_root_port_realize(DeviceState *dev, Error **errp)
-{
- PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(dev);
- PCIDevice *pci = PCI_DEVICE(dev);
- Error *local_err = NULL;
-
- rpc->parent_realize(dev, &local_err);
- if (local_err) {
- error_propagate(errp, local_err);
- return;
- }
- pci_config_set_interrupt_pin(pci->config, 0);
-}
-
-static void pnv_phb3_root_port_class_init(ObjectClass *klass, void *data)
-{
- DeviceClass *dc = DEVICE_CLASS(klass);
- PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- PCIERootPortClass *rpc = PCIE_ROOT_PORT_CLASS(klass);
-
- dc->desc = "IBM PHB3 PCIE Root Port";
-
- device_class_set_parent_realize(dc, pnv_phb3_root_port_realize,
- &rpc->parent_realize);
- dc->user_creatable = false;
-
- k->vendor_id = PCI_VENDOR_ID_IBM;
- k->device_id = 0x03dc;
- k->revision = 0;
-
- rpc->exp_offset = 0x48;
- rpc->aer_offset = 0x100;
-}
-
-static const TypeInfo pnv_phb3_root_port_info = {
- .name = TYPE_PNV_PHB3_ROOT_PORT,
- .parent = TYPE_PCIE_ROOT_PORT,
- .instance_size = sizeof(PnvPHB3RootPort),
- .class_init = pnv_phb3_root_port_class_init,
-};
-
static void pnv_phb3_register_types(void)
{
type_register_static(&pnv_phb3_root_bus_info);
- type_register_static(&pnv_phb3_root_port_info);
type_register_static(&pnv_phb3_type_info);
type_register_static(&pnv_phb3_iommu_memory_region_info);
}
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index ae6cd14a8a..672227a0e1 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -2129,6 +2129,7 @@ static void pnv_machine_power8_class_init(ObjectClass
*oc, void *data)
static GlobalProperty phb_compat[] = {
{ TYPE_PNV_PHB, "version", "3" },
+ { TYPE_PNV_PHB_ROOT_PORT, "version", "3" },
};
mc->desc = "IBM PowerNV (Non-Virtualized) POWER8";
diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h
index 3b9ff1096a..bff69201d9 100644
--- a/include/hw/pci-host/pnv_phb3.h
+++ b/include/hw/pci-host/pnv_phb3.h
@@ -108,12 +108,6 @@ struct PnvPBCQState {
*/
#define TYPE_PNV_PHB3_ROOT_BUS "pnv-phb3-root"
-#define TYPE_PNV_PHB3_ROOT_PORT "pnv-phb3-root-port"
-
-typedef struct PnvPHB3RootPort {
- PCIESlot parent_obj;
-} PnvPHB3RootPort;
-
/*
* PHB3 PCIe Host Bridge for PowerNV machines (POWER8)
*/
--
2.37.2
- [PULL 03/60] ppc/pnv: Add initial P9/10 SBE model, (continued)
- [PULL 03/60] ppc/pnv: Add initial P9/10 SBE model, Daniel Henrique Barboza, 2022/08/31
- [PULL 04/60] fpu: Add rebias bool, value and operation, Daniel Henrique Barboza, 2022/08/31
- [PULL 05/60] target/ppc: Bugfix FP when OE/UE are set, Daniel Henrique Barboza, 2022/08/31
- [PULL 01/60] pseries: Update SLOF firmware image, Daniel Henrique Barboza, 2022/08/31
- [PULL 06/60] ppc/pnv: add PHB3 bus init helper, Daniel Henrique Barboza, 2022/08/31
- [PULL 07/60] ppc/pnv: add PnvPHB base/proxy device, Daniel Henrique Barboza, 2022/08/31
- [PULL 08/60] ppc/pnv: turn PnvPHB3 into a PnvPHB backend, Daniel Henrique Barboza, 2022/08/31
- [PULL 09/60] ppc/pnv: add PHB4 bus init helper, Daniel Henrique Barboza, 2022/08/31
- [PULL 10/60] ppc/pnv: turn PnvPHB4 into a PnvPHB backend, Daniel Henrique Barboza, 2022/08/31
- [PULL 11/60] ppc/pnv: add pnv-phb-root-port device, Daniel Henrique Barboza, 2022/08/31
- [PULL 12/60] ppc/pnv: remove pnv-phb3-root-port,
Daniel Henrique Barboza <=
- [PULL 13/60] ppc/pnv: remove pnv-phb4-root-port, Daniel Henrique Barboza, 2022/08/31
- [PULL 15/60] ppc/pnv: remove pecc->rp_model, Daniel Henrique Barboza, 2022/08/31
- [PULL 14/60] ppc/pnv: remove root port name from pnv_phb_attach_root_port(), Daniel Henrique Barboza, 2022/08/31
- [PULL 16/60] ppc/pnv: remove PnvPHB4.version, Daniel Henrique Barboza, 2022/08/31
- [PULL 17/60] ppc/pnv: move attach_root_port helper to pnv-phb.c, Daniel Henrique Barboza, 2022/08/31
- [PULL 18/60] ppc/pnv: add phb-id/chip-id PnvPHB3RootBus properties, Daniel Henrique Barboza, 2022/08/31
- [PULL 20/60] ppc/pnv: set root port chassis and slot using Bus properties, Daniel Henrique Barboza, 2022/08/31
- [PULL 21/60] ppc/pnv: add helpers for pnv-phb user devices, Daniel Henrique Barboza, 2022/08/31
- [PULL 19/60] ppc/pnv: add phb-id/chip-id PnvPHB4RootBus properties, Daniel Henrique Barboza, 2022/08/31
- [PULL 22/60] ppc/pnv: turn chip8->phbs[] into a PnvPHB* array, Daniel Henrique Barboza, 2022/08/31