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[PULL 18/84] target/arm: Drop DisasContext.tmp_a64
From: |
Richard Henderson |
Subject: |
[PULL 18/84] target/arm: Drop DisasContext.tmp_a64 |
Date: |
Sun, 5 Mar 2023 16:38:48 -0800 |
Translators are no longer required to free tcg temporaries,
therefore there's no need to record temps for later freeing.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tcg/translate.h | 3 ---
target/arm/tcg/translate-a64.c | 25 +------------------------
2 files changed, 1 insertion(+), 27 deletions(-)
diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h
index 853a0b84e6..a5dd518903 100644
--- a/target/arm/tcg/translate.h
+++ b/target/arm/tcg/translate.h
@@ -149,9 +149,6 @@ typedef struct DisasContext {
int c15_cpar;
/* TCG op of the current insn_start. */
TCGOp *insn_start;
-#define TMP_A64_MAX 16
- int tmp_a64_count;
- TCGv_i64 tmp_a64[TMP_A64_MAX];
} DisasContext;
typedef struct DisasCompare {
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index d1e677ca76..ea1f23b2e7 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -408,27 +408,9 @@ static void gen_goto_tb(DisasContext *s, int n, int64_t
diff)
}
}
-static void init_tmp_a64_array(DisasContext *s)
-{
-#ifdef CONFIG_DEBUG_TCG
- memset(s->tmp_a64, 0, sizeof(s->tmp_a64));
-#endif
- s->tmp_a64_count = 0;
-}
-
-static void free_tmp_a64(DisasContext *s)
-{
- int i;
- for (i = 0; i < s->tmp_a64_count; i++) {
- tcg_temp_free_i64(s->tmp_a64[i]);
- }
- init_tmp_a64_array(s);
-}
-
TCGv_i64 new_tmp_a64(DisasContext *s)
{
- assert(s->tmp_a64_count < TMP_A64_MAX);
- return s->tmp_a64[s->tmp_a64_count++] = tcg_temp_new_i64();
+ return tcg_temp_new_i64();
}
TCGv_i64 new_tmp_a64_zero(DisasContext *s)
@@ -14781,8 +14763,6 @@ static void
aarch64_tr_init_disas_context(DisasContextBase *dcbase,
bound = 1;
}
dc->base.max_insns = MIN(dc->base.max_insns, bound);
-
- init_tmp_a64_array(dc);
}
static void aarch64_tr_tb_start(DisasContextBase *db, CPUState *cpu)
@@ -14938,9 +14918,6 @@ static void aarch64_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cpu)
break;
}
- /* if we allocated any temporaries, free them here */
- free_tmp_a64(s);
-
/*
* After execution of most insns, btype is reset to 0.
* Note that we set btype == -1 when the insn sets btype.
--
2.34.1
- [PULL 00/84] tcg patch queue, Richard Henderson, 2023/03/05
- [PULL 01/84] tcg: Include "qemu/timer.h" for profile_getclock, Richard Henderson, 2023/03/05
- [PULL 02/84] tcg: Link branches to the labels, Richard Henderson, 2023/03/05
- [PULL 05/84] accel/tcg: Retain prot flags from tlb_fill, Richard Henderson, 2023/03/05
- [PULL 03/84] tcg: Merge two sequential labels, Richard Henderson, 2023/03/05
- [PULL 06/84] accel/tcg: Honor TLB_DISCARD_WRITE in atomic_mmu_lookup, Richard Henderson, 2023/03/05
- [PULL 08/84] accel/tcg: Trigger watchpoints from atomic_mmu_lookup, Richard Henderson, 2023/03/05
- [PULL 18/84] target/arm: Drop DisasContext.tmp_a64,
Richard Henderson <=
- [PULL 17/84] target/arm: Drop tcg_temp_free from translator.c, Richard Henderson, 2023/03/05
- [PULL 09/84] include/qemu/cpuid: Introduce xgetbv_low, Richard Henderson, 2023/03/05
- [PULL 16/84] target/arm: Remove value_global from DisasCompare, Richard Henderson, 2023/03/05
- [PULL 30/84] target/avr: Drop R from trans_COM, Richard Henderson, 2023/03/05
- [PULL 13/84] accel/tcg: Remove translator_loop_temp_check, Richard Henderson, 2023/03/05
- [PULL 04/84] target/sparc: Use tlb_set_page_full, Richard Henderson, 2023/03/05
- [PULL 07/84] softmmu: Check watchpoints for read+write at once, Richard Henderson, 2023/03/05
- [PULL 10/84] tcg/i386: Mark Win64 call-saved vector regs as reserved, Richard Henderson, 2023/03/05
- [PULL 11/84] tcg: Decode the operand to INDEX_op_mb in dumps, Richard Henderson, 2023/03/05
- [PULL 14/84] target/alpha: Drop tcg_temp_free, Richard Henderson, 2023/03/05