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[PULL 10/84] tcg/i386: Mark Win64 call-saved vector regs as reserved
From: |
Richard Henderson |
Subject: |
[PULL 10/84] tcg/i386: Mark Win64 call-saved vector regs as reserved |
Date: |
Sun, 5 Mar 2023 16:38:40 -0800 |
While we do not include these in tcg_target_reg_alloc_order,
and therefore they ought never be allocated, it seems safer
to mark them reserved as well.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/i386/tcg-target.c.inc | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 028ece62a0..4060a35cf6 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -4218,6 +4218,19 @@ static void tcg_target_init(TCGContext *s)
s->reserved_regs = 0;
tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
+#ifdef _WIN64
+ /* These are call saved, and we don't save them, so don't use them. */
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM6);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM7);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM8);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM9);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM10);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM11);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM12);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM13);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM14);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_XMM15);
+#endif
}
typedef struct {
--
2.34.1
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- [PULL 08/84] accel/tcg: Trigger watchpoints from atomic_mmu_lookup, Richard Henderson, 2023/03/05
- [PULL 18/84] target/arm: Drop DisasContext.tmp_a64, Richard Henderson, 2023/03/05
- [PULL 17/84] target/arm: Drop tcg_temp_free from translator.c, Richard Henderson, 2023/03/05
- [PULL 09/84] include/qemu/cpuid: Introduce xgetbv_low, Richard Henderson, 2023/03/05
- [PULL 16/84] target/arm: Remove value_global from DisasCompare, Richard Henderson, 2023/03/05
- [PULL 30/84] target/avr: Drop R from trans_COM, Richard Henderson, 2023/03/05
- [PULL 13/84] accel/tcg: Remove translator_loop_temp_check, Richard Henderson, 2023/03/05
- [PULL 04/84] target/sparc: Use tlb_set_page_full, Richard Henderson, 2023/03/05
- [PULL 07/84] softmmu: Check watchpoints for read+write at once, Richard Henderson, 2023/03/05
- [PULL 10/84] tcg/i386: Mark Win64 call-saved vector regs as reserved,
Richard Henderson <=
- [PULL 11/84] tcg: Decode the operand to INDEX_op_mb in dumps, Richard Henderson, 2023/03/05
- [PULL 14/84] target/alpha: Drop tcg_temp_free, Richard Henderson, 2023/03/05
- [PULL 19/84] target/arm: Drop new_tmp_a64, Richard Henderson, 2023/03/05
- [PULL 22/84] target/arm: Drop tcg_temp_free from translator-m-nocp.c, Richard Henderson, 2023/03/05
- [PULL 25/84] target/arm: Drop tcg_temp_free from translator-sme.c, Richard Henderson, 2023/03/05
- [PULL 26/84] target/arm: Drop tcg_temp_free from translator-sve.c, Richard Henderson, 2023/03/05
- [PULL 24/84] target/arm: Drop tcg_temp_free from translator-neon.c, Richard Henderson, 2023/03/05
- [PULL 27/84] target/arm: Drop tcg_temp_free from translator-vfp.c, Richard Henderson, 2023/03/05
- [PULL 29/84] target/avr: Drop DisasContext.free_skip_var0, Richard Henderson, 2023/03/05
- [PULL 28/84] target/arm: Drop tcg_temp_free from translator.h, Richard Henderson, 2023/03/05