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[PULL 77/84] target/s390x: Split out gen_ri2
From: |
Richard Henderson |
Subject: |
[PULL 77/84] target/s390x: Split out gen_ri2 |
Date: |
Sun, 5 Mar 2023 16:39:47 -0800 |
Use tcg_constant_i64. Adjust in2_mri2_* to allocate a new
temporary for the output, using gen_ri2 for the address.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/s390x/tcg/translate.c | 23 ++++++++++++++---------
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c
index 811049ea28..21a57d5eb2 100644
--- a/target/s390x/tcg/translate.c
+++ b/target/s390x/tcg/translate.c
@@ -5886,9 +5886,14 @@ static void in2_a2(DisasContext *s, DisasOps *o)
}
#define SPEC_in2_a2 0
+static TCGv gen_ri2(DisasContext *s)
+{
+ return tcg_constant_i64(s->base.pc_next + (int64_t)get_field(s, i2) * 2);
+}
+
static void in2_ri2(DisasContext *s, DisasOps *o)
{
- o->in2 = tcg_const_i64(s->base.pc_next + (int64_t)get_field(s, i2) * 2);
+ o->in2 = gen_ri2(s);
}
#define SPEC_in2_ri2 0
@@ -5976,29 +5981,29 @@ static void in2_m2_64a(DisasContext *s, DisasOps *o)
static void in2_mri2_16u(DisasContext *s, DisasOps *o)
{
- in2_ri2(s, o);
- tcg_gen_qemu_ld16u(o->in2, o->in2, get_mem_index(s));
+ o->in2 = tcg_temp_new_i64();
+ tcg_gen_qemu_ld16u(o->in2, gen_ri2(s), get_mem_index(s));
}
#define SPEC_in2_mri2_16u 0
static void in2_mri2_32s(DisasContext *s, DisasOps *o)
{
- in2_ri2(s, o);
- tcg_gen_qemu_ld32s(o->in2, o->in2, get_mem_index(s));
+ o->in2 = tcg_temp_new_i64();
+ tcg_gen_qemu_ld32s(o->in2, gen_ri2(s), get_mem_index(s));
}
#define SPEC_in2_mri2_32s 0
static void in2_mri2_32u(DisasContext *s, DisasOps *o)
{
- in2_ri2(s, o);
- tcg_gen_qemu_ld32u(o->in2, o->in2, get_mem_index(s));
+ o->in2 = tcg_temp_new_i64();
+ tcg_gen_qemu_ld32u(o->in2, gen_ri2(s), get_mem_index(s));
}
#define SPEC_in2_mri2_32u 0
static void in2_mri2_64(DisasContext *s, DisasOps *o)
{
- in2_ri2(s, o);
- tcg_gen_qemu_ld64(o->in2, o->in2, get_mem_index(s));
+ o->in2 = tcg_temp_new_i64();
+ tcg_gen_qemu_ld64(o->in2, gen_ri2(s), get_mem_index(s));
}
#define SPEC_in2_mri2_64 0
--
2.34.1
- [PULL 72/84] target/hexagon/idef-parser: Use gen_tmp for gen_rvalue_pred, (continued)
- [PULL 72/84] target/hexagon/idef-parser: Use gen_tmp for gen_rvalue_pred, Richard Henderson, 2023/03/05
- [PULL 46/84] target/microblaze: Drop tcg_temp_free, Richard Henderson, 2023/03/05
- [PULL 64/84] target/mips: Fix trans_mult_acc return, Richard Henderson, 2023/03/05
- [PULL 67/84] tracing: remove transform.py, Richard Henderson, 2023/03/05
- [PULL 71/84] target/hexagon/idef-parser: Use gen_tmp for gen_pred_assign, Richard Henderson, 2023/03/05
- [PULL 76/84] target/riscv: Avoid tcg_const_*, Richard Henderson, 2023/03/05
- [PULL 73/84] target/hexagon/idef-parser: Use gen_constant for gen_extend_tcg_width_op, Richard Henderson, 2023/03/05
- [PULL 66/84] include/exec/gen-icount: Drop tcg_temp_free in gen_tb_start, Richard Henderson, 2023/03/05
- [PULL 74/84] target/i386: Simplify POPF, Richard Henderson, 2023/03/05
- [PULL 78/84] target/sparc: Avoid tcg_const_{tl,i32}, Richard Henderson, 2023/03/05
- [PULL 77/84] target/s390x: Split out gen_ri2,
Richard Henderson <=
- [PULL 75/84] target/microblaze: Avoid tcg_const_* throughout, Richard Henderson, 2023/03/05
- [PULL 53/84] target/rx: Drop tcg_temp_free, Richard Henderson, 2023/03/05
- [PULL 56/84] target/sparc: Drop get_temp_i32, Richard Henderson, 2023/03/05
- [PULL 70/84] target/hexagon/idef-parser: Use gen_tmp for LPCFG, Richard Henderson, 2023/03/05
- [PULL 79/84] target/xtensa: Tidy translate_bb, Richard Henderson, 2023/03/05
- [PULL 80/84] target/xtensa: Tidy translate_clamps, Richard Henderson, 2023/03/05
- [PULL 83/84] target/xtensa: Split constant in bit shift, Richard Henderson, 2023/03/05
- [PULL 82/84] target/xtensa: Use tcg_gen_subfi_i32 in translate_sll, Richard Henderson, 2023/03/05
- [PULL 84/84] target/xtensa: Avoid tcg_const_i32, Richard Henderson, 2023/03/05
- [PULL 81/84] target/xtensa: Avoid tcg_const_i32 in translate_l32r, Richard Henderson, 2023/03/05