[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v2 2/5] tcg: Elide memory barriers implied by the host memory mod
From: |
Richard Henderson |
Subject: |
[PATCH v2 2/5] tcg: Elide memory barriers implied by the host memory model |
Date: |
Sun, 5 Mar 2023 17:57:07 -0800 |
Reduce the set of required barriers to those needed by
the host right from the beginning.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/tcg-op.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index 75fdcdaac7..2721c1cab9 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -107,8 +107,13 @@ void tcg_gen_mb(TCGBar mb_type)
* (i.e. !(cflags & CF_PARALLEL)), however, even with a single cpu
* we have i/o threads running in parallel, and lack of memory order
* can result in e.g. virtio queue entries being read incorrectly.
+ *
+ * That said, we can elide anything which the host provides for free.
*/
- tcg_gen_op1(INDEX_op_mb, mb_type);
+ mb_type &= ~TCG_TARGET_DEFAULT_MO;
+ if (mb_type & TCG_MO_ALL) {
+ tcg_gen_op1(INDEX_op_mb, mb_type);
+ }
}
/* 32 bit ops */
--
2.34.1