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Re: [PATCH 0/8] Fix missing memory barriers on ARM
From: |
Paolo Bonzini |
Subject: |
Re: [PATCH 0/8] Fix missing memory barriers on ARM |
Date: |
Mon, 6 Mar 2023 15:14:03 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 |
On 3/6/23 14:35, David Hildenbrand wrote:
Note: I have a follow-up set of patches that gets rid completely of
atomic_mb_read(); atomic_mb_set() instead can remain and mimic Linux's
smp_store_mb() operation. A glimpse of these changes is already visible
in patches 7 and 8.
That sounds interesting. I was briefly confused about atomic_mb_* ...
... do we want to add some Fixes: tags or is it too hard to come up with
something reasonable?
The Fixes tag would often point to
commit a0aa44b488b3601415d55041e4619aef5f3a4ba8
Author: Alex Bennée <alex.bennee@linaro.org>
Date: Thu Jan 28 10:15:17 2016 +0000
include/qemu/atomic.h: default to __atomic functions
The __atomic primitives have been available since GCC 4.7 and provide
a richer interface for describing memory ordering requirements. As a
bonus by using the primitives instead of hand-rolled functions we can
use tools such as the ThreadSanitizer which need the use of well
defined APIs for its analysis.
If we have __ATOMIC defines we exclusively use the __atomic primitives
for all our atomic access. Otherwise we fall back to the mixture of
__sync and hand-rolled barrier cases.
(for which I would have sworn I was the sole perpetrator, not just the
committer). But it pre-dates some of the code that is being fixed, so
I am not sure it makes sense to add it.
Paolo
- Re: [PATCH 6/8] aio-wait: switch to smp_mb__after_rmw(), (continued)