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[PULL 09/21] target/arm: Simplify iteration over bit widths
From: |
Peter Maydell |
Subject: |
[PULL 09/21] target/arm: Simplify iteration over bit widths |
Date: |
Mon, 6 Mar 2023 15:34:23 +0000 |
From: Richard Henderson <richard.henderson@linaro.org>
Order suf[] by the log8 of the width.
Use ARRAY_SIZE instead of hard-coding 128.
This changes the order of the union definitions,
but retains the order of the union-of-union members.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230227213329.793795-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/gdbstub64.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/arm/gdbstub64.c b/target/arm/gdbstub64.c
index 36166bf81eb..3d9e9e97c86 100644
--- a/target/arm/gdbstub64.c
+++ b/target/arm/gdbstub64.c
@@ -240,8 +240,8 @@ static void output_vector_union_type(GString *s, int
reg_width,
{ "int8", 8, 'b', 's' },
};
- static const char suf[] = { 'q', 'd', 's', 'h', 'b' };
- int i, j, bits;
+ static const char suf[] = { 'b', 'h', 's', 'd', 'q' };
+ int i, j;
/* First define types and totals in a whole VL */
for (i = 0; i < ARRAY_SIZE(vec_lanes); i++) {
@@ -256,7 +256,9 @@ static void output_vector_union_type(GString *s, int
reg_width,
* signed and potentially float versions of each size from 128 to
* 8 bits.
*/
- for (bits = 128, i = 0; bits >= 8; bits /= 2, i++) {
+ for (i = 0; i < ARRAY_SIZE(suf); i++) {
+ int bits = 8 << i;
+
g_string_append_printf(s, "<union id=\"%sn%c\">", name, suf[i]);
for (j = 0; j < ARRAY_SIZE(vec_lanes); j++) {
if (vec_lanes[j].size == bits) {
@@ -270,7 +272,7 @@ static void output_vector_union_type(GString *s, int
reg_width,
/* And now the final union of unions */
g_string_append_printf(s, "<union id=\"%s\">", name);
- for (bits = 128, i = 0; bits >= 8; bits /= 2, i++) {
+ for (i = ARRAY_SIZE(suf) - 1; i >= 0; i--) {
g_string_append_printf(s, "<field name=\"%c\" type=\"%sn%c\"/>",
suf[i], name, suf[i]);
}
--
2.34.1
- [PULL 00/21] target-arm queue, Peter Maydell, 2023/03/06
- [PULL 01/21] target/arm: Normalize aarch64 gdbstub get/set function names, Peter Maydell, 2023/03/06
- [PULL 05/21] target/arm: Simplify register counting in arm_gen_dynamic_svereg_xml, Peter Maydell, 2023/03/06
- [PULL 02/21] target/arm: Unexport arm_gen_dynamic_sysreg_xml, Peter Maydell, 2023/03/06
- [PULL 09/21] target/arm: Simplify iteration over bit widths,
Peter Maydell <=
- [PULL 04/21] target/arm: Split out output_vector_union_type, Peter Maydell, 2023/03/06
- [PULL 03/21] target/arm: Move arm_gen_dynamic_svereg_xml to gdbstub64.c, Peter Maydell, 2023/03/06
- [PULL 07/21] target/arm: Fix svep width in arm_gen_dynamic_svereg_xml, Peter Maydell, 2023/03/06
- [PULL 08/21] target/arm: Add name argument to output_vector_union_type, Peter Maydell, 2023/03/06
- [PULL 10/21] target/arm: Create pauth_ptr_mask, Peter Maydell, 2023/03/06
- [PULL 06/21] target/arm: Hoist pred_width in arm_gen_dynamic_svereg_xml, Peter Maydell, 2023/03/06
- [PULL 12/21] target/arm: Export arm_v7m_mrs_control, Peter Maydell, 2023/03/06
- [PULL 15/21] target/arm: Handle m-profile in arm_is_secure, Peter Maydell, 2023/03/06
- [PULL 13/21] target/arm: Export arm_v7m_get_sp_ptr, Peter Maydell, 2023/03/06
- [PULL 17/21] target/arm: Diagnose incorrect usage of arm_is_secure subroutines, Peter Maydell, 2023/03/06