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[PULL 56/67] target/rx: Avoid tcg_const_i32 when new temp needed
From: |
Richard Henderson |
Subject: |
[PULL 56/67] target/rx: Avoid tcg_const_i32 when new temp needed |
Date: |
Tue, 7 Mar 2023 09:58:37 -0800 |
These three cases use a constant as first input, and
then overwrite the temp in the output. Separate them.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/rx/translate.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/target/rx/translate.c b/target/rx/translate.c
index c47aa26893..6b218d5d5e 100644
--- a/target/rx/translate.c
+++ b/target/rx/translate.c
@@ -1313,10 +1313,10 @@ static bool trans_SHLL_rr(DisasContext *ctx,
arg_SHLL_rr *a)
done = gen_new_label();
/* if (cpu_regs[a->rs]) { */
tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_regs[a->rs], 0, noshift);
- count = tcg_const_i32(32);
+ count = tcg_temp_new();
tmp = tcg_temp_new();
tcg_gen_andi_i32(tmp, cpu_regs[a->rs], 31);
- tcg_gen_sub_i32(count, count, tmp);
+ tcg_gen_sub_i32(count, tcg_constant_i32(32), tmp);
tcg_gen_sar_i32(cpu_psw_c, cpu_regs[a->rd], count);
tcg_gen_shl_i32(cpu_regs[a->rd], cpu_regs[a->rd], tmp);
tcg_gen_setcondi_i32(TCG_COND_EQ, cpu_psw_o, cpu_psw_c, 0);
@@ -1979,10 +1979,10 @@ static inline void rx_bnotr(TCGv reg, TCGv mask)
cat3(arg_, name, _rr) * a) \
{ \
TCGv mask, b; \
- mask = tcg_const_i32(1); \
+ mask = tcg_temp_new(); \
b = tcg_temp_new(); \
tcg_gen_andi_i32(b, cpu_regs[a->rs], 31); \
- tcg_gen_shl_i32(mask, mask, b); \
+ tcg_gen_shl_i32(mask, tcg_constant_i32(1), b); \
cat3(rx_, op, r)(cpu_regs[a->rd], mask); \
return true; \
} \
@@ -1990,10 +1990,10 @@ static inline void rx_bnotr(TCGv reg, TCGv mask)
cat3(arg_, name, _rm) * a) \
{ \
TCGv mask, mem, addr, b; \
- mask = tcg_const_i32(1); \
+ mask = tcg_temp_new(); \
b = tcg_temp_new(); \
tcg_gen_andi_i32(b, cpu_regs[a->rd], 7); \
- tcg_gen_shl_i32(mask, mask, b); \
+ tcg_gen_shl_i32(mask, tcg_constant_i32(1), b); \
mem = tcg_temp_new(); \
addr = rx_index_addr(ctx, mem, a->ld, MO_8, a->rs); \
cat3(rx_, op, m)(addr, mask); \
--
2.34.1
- [PULL 45/67] target/m68k: Avoid tcg_const_i32 when modified, (continued)
- [PULL 45/67] target/m68k: Avoid tcg_const_i32 when modified, Richard Henderson, 2023/03/07
- [PULL 44/67] target/i386: Avoid use of tcg_const_* throughout, Richard Henderson, 2023/03/07
- [PULL 46/67] target/m68k: Avoid tcg_const_i32 in bfop_reg, Richard Henderson, 2023/03/07
- [PULL 48/67] target/mips: Split out gen_lxl, Richard Henderson, 2023/03/07
- [PULL 49/67] target/mips: Split out gen_lxr, Richard Henderson, 2023/03/07
- [PULL 52/67] target/ppc: Split out gen_vx_vmul10, Richard Henderson, 2023/03/07
- [PULL 51/67] target/mips: Avoid tcg_const_* throughout, Richard Henderson, 2023/03/07
- [PULL 55/67] target/rx: Use cpu_psw_z as temp in flags computation, Richard Henderson, 2023/03/07
- [PULL 50/67] target/mips: Avoid tcg_const_tl in gen_r6_ld, Richard Henderson, 2023/03/07
- [PULL 54/67] target/rx: Use tcg_gen_abs_i32, Richard Henderson, 2023/03/07
- [PULL 56/67] target/rx: Avoid tcg_const_i32 when new temp needed,
Richard Henderson <=
- [PULL 47/67] target/m68k: Avoid tcg_const_* throughout, Richard Henderson, 2023/03/07
- [PULL 57/67] target/rx: Avoid tcg_const_i32, Richard Henderson, 2023/03/07
- [PULL 59/67] target/sh4: Avoid tcg_const_i32 for TAS.B, Richard Henderson, 2023/03/07
- [PULL 60/67] target/sh4: Avoid tcg_const_i32, Richard Henderson, 2023/03/07
- [PULL 53/67] target/ppc: Avoid tcg_const_i64 in do_vector_shift_quad, Richard Henderson, 2023/03/07
- [PULL 58/67] target/s390x: Avoid tcg_const_i64, Richard Henderson, 2023/03/07
- [PULL 61/67] tcg/sparc: Avoid tcg_const_tl in gen_edge, Richard Henderson, 2023/03/07
- [PULL 62/67] target/tricore: Split t_n as constant from temp as variable, Richard Henderson, 2023/03/07
- [PULL 64/67] target/tricore: Use setcondi instead of explicit allocation, Richard Henderson, 2023/03/07
- [PULL 65/67] target/tricore: Drop some temp initialization, Richard Henderson, 2023/03/07