[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 41/45] crypto: Create sm4_subword
From: |
Lawrence Hunter |
Subject: |
[PATCH 41/45] crypto: Create sm4_subword |
Date: |
Fri, 10 Mar 2023 09:12:11 +0000 |
From: Max Chou <max.chou@sifive.com>
- Share sm4_subword between different targets.
Signed-off-by: Max Chou <max.chou@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
---
include/crypto/sm4.h | 8 ++++++++
target/arm/tcg/crypto_helper.c | 10 ++--------
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/include/crypto/sm4.h b/include/crypto/sm4.h
index 9bd3ebc62e..de8245d8a7 100644
--- a/include/crypto/sm4.h
+++ b/include/crypto/sm4.h
@@ -3,4 +3,12 @@
extern const uint8_t sm4_sbox[256];
+static inline uint32_t sm4_subword(uint32_t word)
+{
+ return sm4_sbox[word & 0xff] |
+ sm4_sbox[(word >> 8) & 0xff] << 8 |
+ sm4_sbox[(word >> 16) & 0xff] << 16 |
+ sm4_sbox[(word >> 24) & 0xff] << 24;
+}
+
#endif
diff --git a/target/arm/tcg/crypto_helper.c b/target/arm/tcg/crypto_helper.c
index d28690321f..58e6c4f779 100644
--- a/target/arm/tcg/crypto_helper.c
+++ b/target/arm/tcg/crypto_helper.c
@@ -707,10 +707,7 @@ static void do_crypto_sm4e(uint64_t *rd, uint64_t *rn,
uint64_t *rm)
CR_ST_WORD(d, (i + 3) % 4) ^
CR_ST_WORD(n, i);
- t = sm4_sbox[t & 0xff] |
- sm4_sbox[(t >> 8) & 0xff] << 8 |
- sm4_sbox[(t >> 16) & 0xff] << 16 |
- sm4_sbox[(t >> 24) & 0xff] << 24;
+ t = sm4_subword(t);
CR_ST_WORD(d, i) ^= t ^ rol32(t, 2) ^ rol32(t, 10) ^ rol32(t, 18) ^
rol32(t, 24);
@@ -744,10 +741,7 @@ static void do_crypto_sm4ekey(uint64_t *rd, uint64_t *rn,
uint64_t *rm)
CR_ST_WORD(d, (i + 3) % 4) ^
CR_ST_WORD(m, i);
- t = sm4_sbox[t & 0xff] |
- sm4_sbox[(t >> 8) & 0xff] << 8 |
- sm4_sbox[(t >> 16) & 0xff] << 16 |
- sm4_sbox[(t >> 24) & 0xff] << 24;
+ t = sm4_subword(t);
CR_ST_WORD(d, i) ^= t ^ rol32(t, 13) ^ rol32(t, 23);
}
--
2.39.2
- [PATCH 32/45] target/riscv: Expose zvknh cpu properties, (continued)
- [PATCH 32/45] target/riscv: Expose zvknh cpu properties, Lawrence Hunter, 2023/03/10
- [PATCH 43/45] target/riscv: Add zvksed cfg property, Lawrence Hunter, 2023/03/10
- [PATCH 31/45] target/riscv: Add vsha2c[hl].vv decoding, translation and execution support, Lawrence Hunter, 2023/03/10
- [PATCH 35/45] target/riscv: Add vsm3c.vi decoding, translation and execution support, Lawrence Hunter, 2023/03/10
- [PATCH 34/45] target/riscv: Add vsm3me.vv decoding, translation and execution support, Lawrence Hunter, 2023/03/10
- [PATCH 37/45] target/riscv: Add zvkg cpu property, Lawrence Hunter, 2023/03/10
- [PATCH 40/45] target/riscv: Expose zvkg cpu property, Lawrence Hunter, 2023/03/10
- [PATCH 45/45] target/riscv: Expose Zvksed property, Lawrence Hunter, 2023/03/10
- [PATCH 36/45] target/riscv: Expose zvksh cpu property, Lawrence Hunter, 2023/03/10
- [PATCH 44/45] target/riscv: Add Zvksed support, Lawrence Hunter, 2023/03/10
- [PATCH 41/45] crypto: Create sm4_subword,
Lawrence Hunter <=
- [PATCH 39/45] target/riscv: Add vghsh.vv decoding, translation and execution support, Lawrence Hunter, 2023/03/10
- [PATCH 42/45] crypto: Add SM4 constant parameter CK, Lawrence Hunter, 2023/03/10
- [PATCH 38/45] target/riscv: Add vgmul.vv decoding, translation and execution support, Lawrence Hunter, 2023/03/10
- [PATCH 33/45] target/riscv: Add zvksh cpu property, Lawrence Hunter, 2023/03/10
- [PATCH 30/45] target/riscv: Add vsha2ms.vv decoding, translation and execution support, Lawrence Hunter, 2023/03/10
- Re: [PATCH 00/45] Add RISC-V vector cryptographic instruction set support, Christoph Müllner, 2023/03/21
- [PATCH 00/45] Add RISC-V vector cryptographic instruction set support, Lawrence Hunter, 2023/03/10