Add read and write functions for accessing registers of I2C devices
connected to the Aspeed I2C controller.
Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Ninad Palsule <ninad@linux.ibm.com>
---
include/hw/i2c/aspeed_i2c.h | 7 +++
tests/qtest/qtest_aspeed.c | 109 ++++++++++++++++++++++++++++++++++++
tests/qtest/qtest_aspeed.h | 36 ++++++++++++
3 files changed, 152 insertions(+)
create mode 100644 tests/qtest/qtest_aspeed.c
create mode 100644 tests/qtest/qtest_aspeed.h
diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h
index adc904d6c1..51c944efea 100644
--- a/include/hw/i2c/aspeed_i2c.h
+++ b/include/hw/i2c/aspeed_i2c.h
@@ -38,6 +38,13 @@ OBJECT_DECLARE_TYPE(AspeedI2CState, AspeedI2CClass,
ASPEED_I2C)
#define ASPEED_I2C_OLD_NUM_REG 11
#define ASPEED_I2C_NEW_NUM_REG 22
+#define A_I2CD_M_STOP_CMD BIT(5)
+#define A_I2CD_M_RX_CMD BIT(3)
+#define A_I2CD_M_TX_CMD BIT(1)
+#define A_I2CD_M_START_CMD BIT(0)
+
+#define A_I2CD_MASTER_EN BIT(0)
+
/* Tx State Machine */
#define I2CD_TX_STATE_MASK 0xf
#define I2CD_IDLE 0x0
diff --git a/tests/qtest/qtest_aspeed.c b/tests/qtest/qtest_aspeed.c
new file mode 100644
index 0000000000..2fcafc22fc
--- /dev/null
+++ b/tests/qtest/qtest_aspeed.c
@@ -0,0 +1,109 @@
+/*
+ * Aspeed i2c bus interface for reading from and writing to i2c device
registers
+ *
+ * Copyright (c) 2023 IBM Corporation
+ *
+ * Authors:
+ * Stefan Berger <stefanb@linux.ibm.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+
+#include "qtest_aspeed.h"
+#include "hw/i2c/aspeed_i2c.h"
+#include "libqtest-single.h"
+
+static void aspeed_i2c_startup(uint32_t baseaddr, uint8_t slave_addr,
+ uint8_t reg)
+{
+ uint32_t v;
+ static int once;
+
+ if (!once) {
+ /* one time: enable master */
+ writel(baseaddr + A_I2CC_FUN_CTRL, 0);
+ v = readl(baseaddr + A_I2CC_FUN_CTRL) | A_I2CD_MASTER_EN;
+ writel(baseaddr + A_I2CC_FUN_CTRL, v);
+ once = 1;
+ }
+
+ /* select device */
+ writel(baseaddr + A_I2CD_BYTE_BUF, slave_addr << 1);
+ writel(baseaddr + A_I2CD_CMD, A_I2CD_M_START_CMD | A_I2CD_M_RX_CMD);
+
+ /* select the register to write to */
+ writel(baseaddr + A_I2CD_BYTE_BUF, reg);
+ writel(baseaddr + A_I2CD_CMD, A_I2CD_M_TX_CMD);
+}
+
+static uint32_t aspeed_i2c_read_n(uint32_t baseaddr, uint8_t slave_addr,
+ uint8_t reg, size_t nbytes)
+{
+ uint32_t res = 0;
+ uint32_t v;
+ size_t i;
+
+ aspeed_i2c_startup(baseaddr, slave_addr, reg);
+
+ for (i = 0; i < nbytes; i++) {
+ writel(baseaddr + A_I2CD_CMD, A_I2CD_M_RX_CMD);
+ v = readl(baseaddr + A_I2CD_BYTE_BUF) >> 8;
+ res |= (v & 0xff) << (i * 8);
+ }
+
+ writel(baseaddr + A_I2CD_CMD, A_I2CD_M_STOP_CMD);
+
+ return res;
+}
+
+uint32_t aspeed_i2c_readl(uint32_t baseaddr, uint8_t slave_addr, uint8_t reg)
+{
+ return aspeed_i2c_read_n(baseaddr, slave_addr, reg, sizeof(uint32_t));
+}
+
+uint16_t aspeed_i2c_readw(uint32_t baseaddr, uint8_t slave_addr, uint8_t reg)
+{
+ return aspeed_i2c_read_n(baseaddr, slave_addr, reg, sizeof(uint16_t));
+}
+
+uint8_t aspeed_i2c_readb(uint32_t baseaddr, uint8_t slave_addr, uint8_t reg)
+{
+ return aspeed_i2c_read_n(baseaddr, slave_addr, reg, sizeof(uint8_t));
+}
+
+static void aspeed_i2c_write_n(uint32_t baseaddr, uint8_t slave_addr,
+ uint8_t reg, uint32_t v, size_t nbytes)
+{
+ size_t i;
+
+ aspeed_i2c_startup(baseaddr, slave_addr, reg);
+
+ for (i = 0; i < nbytes; i++) {
+ writel(baseaddr + A_I2CD_BYTE_BUF, v & 0xff);
+ v >>= 8;
+ writel(baseaddr + A_I2CD_CMD, A_I2CD_M_TX_CMD);
+ }
+
+ writel(baseaddr + A_I2CD_CMD, A_I2CD_M_STOP_CMD);
+}
+
+void aspeed_i2c_writel(uint32_t baseaddr, uint8_t slave_addr,
+ uint8_t reg, uint32_t v)
+{
+ aspeed_i2c_write_n(baseaddr, slave_addr, reg, v, sizeof(v));
+}
+
+void aspeed_i2c_writew(uint32_t baseaddr, uint8_t slave_addr,
+ uint8_t reg, uint16_t v)
+{
+ aspeed_i2c_write_n(baseaddr, slave_addr, reg, v, sizeof(v));
+}
+
+void aspeed_i2c_writeb(uint32_t baseaddr, uint8_t slave_addr,
+ uint8_t reg, uint8_t v)
+{
+ aspeed_i2c_write_n(baseaddr, slave_addr, reg, v, sizeof(v));
+}