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[Qemu-ppc] [PULL 36/66] ppc: Don't update NIP if not taking alignment ex
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 36/66] ppc: Don't update NIP if not taking alignment exceptions |
Date: |
Tue, 6 Sep 2016 13:42:46 +1000 |
From: Benjamin Herrenschmidt <address@hidden>
Move the NIP update to after the conditional branch so that we
don't do it if we aren't going to take the alignment exception
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/translate.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 93cd98c..6320ae5 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -2414,12 +2414,11 @@ static inline void gen_check_align(DisasContext *ctx,
TCGv EA, int mask)
TCGLabel *l1 = gen_new_label();
TCGv t0 = tcg_temp_new();
TCGv_i32 t1, t2;
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
tcg_gen_andi_tl(t0, EA, mask);
tcg_gen_brcondi_tl(TCG_COND_EQ, t0, 0, l1);
t1 = tcg_const_i32(POWERPC_EXCP_ALIGN);
t2 = tcg_const_i32(0);
+ gen_update_nip(ctx, ctx->nip - 4);
gen_helper_raise_exception_err(cpu_env, t1, t2);
tcg_temp_free_i32(t1);
tcg_temp_free_i32(t2);
--
2.7.4
- [Qemu-ppc] [PULL 44/66] ppc: load/store multiple and string insns don't do LE, (continued)
- [Qemu-ppc] [PULL 44/66] ppc: load/store multiple and string insns don't do LE, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 37/66] ppc: Don't update NIP in dcbz and lscbx, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 10/66] target-ppc: add cnttzw[.] instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 28/66] ppc: Don't update NIP in lmw/stmw/icbi, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 24/66] ppc: Make float_check_status() pass the return address, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 43/66] ppc: Use a helper to generate "LE unsupported" alignment interrupts, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 27/66] ppc: Don't update NIP in lswi/lswx/stswi/stswx, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 46/66] target-ppc: implement branch-less divw[o][.], David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 39/66] ppc: Handle unconditional (always/never) traps at translation time, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 42/66] ppc: Don't set access_type on all load/stores on hash64, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 36/66] ppc: Don't update NIP if not taking alignment exceptions,
David Gibson <=
- [Qemu-ppc] [PULL 57/66] ppc: Fix macio ESCC legacy mapping, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 59/66] ppc: Stop dumping state on all exceptions in linux-user, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 48/66] target-ppc: add dtstsfi[q] instructions, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 49/66] target-ppc: add vabsdu[b, h, w] instructions, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 34/66] ppc: Don't update NIP BookE 2.06 tlbwe, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 61/66] ppc: Improve flags for helpers loading/writing the time facilities, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 38/66] ppc: Make alignment exceptions suck less, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 62/66] ppc: Improve the exception helpers flags, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 53/66] target-ppc: add extswsli[.] instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 63/66] ppc: Improve a few more helper flags, David Gibson, 2016/09/05