[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 55/62] ppc4xx_sdram: Add errp parameter to ppc4xx_sdram_banks()
From: |
Daniel Henrique Barboza |
Subject: |
[PULL 55/62] ppc4xx_sdram: Add errp parameter to ppc4xx_sdram_banks() |
Date: |
Fri, 28 Oct 2022 13:39:44 -0300 |
From: BALATON Zoltan <balaton@eik.bme.hu>
Do not exit from ppc4xx_sdram_banks() but report error via an errp
parameter instead.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id:
<04bb3445439c2f37b99e74b3fdf4e62c2e6f7e04.1666194485.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
hw/ppc/ppc4xx_sdram.c | 28 +++++++++++++++++++---------
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git a/hw/ppc/ppc4xx_sdram.c b/hw/ppc/ppc4xx_sdram.c
index 7c097efe20..8d7137faf3 100644
--- a/hw/ppc/ppc4xx_sdram.c
+++ b/hw/ppc/ppc4xx_sdram.c
@@ -52,10 +52,12 @@
* must be one of a small set of sizes. The number of banks and the supported
* sizes varies by SoC.
*/
-static void ppc4xx_sdram_banks(MemoryRegion *ram, int nr_banks,
+static bool ppc4xx_sdram_banks(MemoryRegion *ram, int nr_banks,
Ppc4xxSdramBank ram_banks[],
- const ram_addr_t sdram_bank_sizes[])
+ const ram_addr_t sdram_bank_sizes[],
+ Error **errp)
{
+ ERRP_GUARD();
ram_addr_t size_left = memory_region_size(ram);
ram_addr_t base = 0;
ram_addr_t bank_size;
@@ -93,14 +95,16 @@ static void ppc4xx_sdram_banks(MemoryRegion *ram, int
nr_banks,
sdram_bank_sizes[i] / MiB,
sdram_bank_sizes[i + 1] ? ", " : "");
}
- error_report("at most %d bank%s of %s MiB each supported",
- nr_banks, nr_banks == 1 ? "" : "s", s->str);
- error_printf("Possible valid RAM size: %" PRIi64 " MiB\n",
- used_size ? used_size / MiB : sdram_bank_sizes[i - 1] / MiB);
+ error_setg(errp, "Invalid SDRAM banks");
+ error_append_hint(errp, "at most %d bank%s of %s MiB each supported\n",
+ nr_banks, nr_banks == 1 ? "" : "s", s->str);
+ error_append_hint(errp, "Possible valid RAM size: %" PRIi64 " MiB\n",
+ used_size ? used_size / MiB : sdram_bank_sizes[i - 1] / MiB);
g_string_free(s, true);
- exit(EXIT_FAILURE);
+ return false;
}
+ return true;
}
static void sdram_bank_map(Ppc4xxSdramBank *bank)
@@ -399,7 +403,10 @@ static void ppc4xx_sdram_ddr_realize(DeviceState *dev,
Error **errp)
error_setg(errp, "Missing dram memory region");
return;
}
- ppc4xx_sdram_banks(s->dram_mr, s->nbanks, s->bank, valid_bank_sizes);
+ if (!ppc4xx_sdram_banks(s->dram_mr, s->nbanks, s->bank,
+ valid_bank_sizes, errp)) {
+ return;
+ }
for (i = 0; i < s->nbanks; i++) {
if (s->bank[i].size) {
s->bank[i].bcr = sdram_ddr_bcr(s->bank[i].base, s->bank[i].size);
@@ -666,7 +673,10 @@ static void ppc4xx_sdram_ddr2_realize(DeviceState *dev,
Error **errp)
error_setg(errp, "Missing dram memory region");
return;
}
- ppc4xx_sdram_banks(s->dram_mr, s->nbanks, s->bank, valid_bank_sizes);
+ if (!ppc4xx_sdram_banks(s->dram_mr, s->nbanks, s->bank,
+ valid_bank_sizes, errp)) {
+ return;
+ }
for (i = 0; i < s->nbanks; i++) {
if (s->bank[i].size) {
s->bank[i].bcr = sdram_ddr2_bcr(s->bank[i].base, s->bank[i].size);
--
2.37.3
- [PULL 45/62] target/ppc: introduce ppc_maybe_interrupt, (continued)
- [PULL 45/62] target/ppc: introduce ppc_maybe_interrupt, Daniel Henrique Barboza, 2022/10/28
- [PULL 46/62] target/ppc: unify cpu->has_work based on cs->interrupt_request, Daniel Henrique Barboza, 2022/10/28
- [PULL 47/62] target/ppc: move the p*_interrupt_powersave methods to excp_helper.c, Daniel Henrique Barboza, 2022/10/28
- [PULL 48/62] ppc440_uc.c: Move DDR2 SDRAM controller model to ppc4xx_sdram.c, Daniel Henrique Barboza, 2022/10/28
- [PULL 50/62] ppc4xx_sdram: Move ppc4xx_sdram_banks() to ppc4xx_sdram.c, Daniel Henrique Barboza, 2022/10/28
- [PULL 49/62] ppc4xx_devs.c: Move DDR SDRAM controller model to ppc4xx_sdram.c, Daniel Henrique Barboza, 2022/10/28
- [PULL 51/62] ppc4xx_sdram: Use hwaddr for memory bank size, Daniel Henrique Barboza, 2022/10/28
- [PULL 52/62] ppc4xx_sdram: Rename local state variable for brevity, Daniel Henrique Barboza, 2022/10/28
- [PULL 53/62] ppc4xx_sdram: Generalise bank setup, Daniel Henrique Barboza, 2022/10/28
- [PULL 54/62] ppc4xx_sdram: Convert DDR SDRAM controller to new bank handling, Daniel Henrique Barboza, 2022/10/28
- [PULL 55/62] ppc4xx_sdram: Add errp parameter to ppc4xx_sdram_banks(),
Daniel Henrique Barboza <=
- [PULL 56/62] target/ppc: Add new PMC HFLAGS, Daniel Henrique Barboza, 2022/10/28
- [PULL 57/62] target/ppc: Increment PMC5 with inline insns, Daniel Henrique Barboza, 2022/10/28
- [PULL 58/62] docs/system/ppc/ppce500: Use qemu-system-ppc64 across the board(s), Daniel Henrique Barboza, 2022/10/28
- [PULL 59/62] hw/block/pflash_cfi0{1, 2}: Error out if device length isn't a power of two, Daniel Henrique Barboza, 2022/10/28
- [PULL 60/62] hw/sd/sdhci-internal: Unexport ESDHC defines, Daniel Henrique Barboza, 2022/10/28
- [PULL 61/62] hw/sd/sdhci: Rename ESDHC_* defines to USDHC_*, Daniel Henrique Barboza, 2022/10/28
- [PULL 62/62] hw/ppc/e500: Implement pflash handling, Daniel Henrique Barboza, 2022/10/28
- Re: [PULL 00/62] ppc queue, Daniel Henrique Barboza, 2022/10/28