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[PATCH v3 2/9] target/ppc: Fix PMU MMCR0[PMCjCE] bit in hflags calculati
From: |
Nicholas Piggin |
Subject: |
[PATCH v3 2/9] target/ppc: Fix PMU MMCR0[PMCjCE] bit in hflags calculation |
Date: |
Mon, 15 May 2023 19:26:48 +1000 |
A store to MMCR0 with PMCjCE=1 fails to update hflags correctly and
results in hflags mismatch:
qemu: fatal: TCG hflags mismatch (current:0x2408003d rebuilt:0x240a003d)
This can be reproduced by running perf on a recent machine.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
Since v2: new patch.
target/ppc/power8-pmu.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/ppc/power8-pmu.c b/target/ppc/power8-pmu.c
index 64a64865d7..29e0012ed6 100644
--- a/target/ppc/power8-pmu.c
+++ b/target/ppc/power8-pmu.c
@@ -236,14 +236,16 @@ void helper_store_mmcr0(CPUPPCState *env, target_ulong
value)
{
bool hflags_pmcc0 = (value & MMCR0_PMCC0) != 0;
bool hflags_pmcc1 = (value & MMCR0_PMCC1) != 0;
+ bool hflags_pmcjce = (value & MMCR0_PMCjCE) != 0;
pmu_update_cycles(env);
env->spr[SPR_POWER_MMCR0] = value;
- /* MMCR0 writes can change HFLAGS_PMCC[01] and HFLAGS_INSN_CNT */
+ /* MMCR0 writes can change HFLAGS_PMCC[01], PMCjCE, and HFLAGS_INSN_CNT */
env->hflags = deposit32(env->hflags, HFLAGS_PMCC0, 1, hflags_pmcc0);
env->hflags = deposit32(env->hflags, HFLAGS_PMCC1, 1, hflags_pmcc1);
+ env->hflags = deposit32(env->hflags, HFLAGS_PMCJCE, 1, hflags_pmcjce);
pmu_update_summaries(env);
--
2.40.1
[PATCH v3 2/9] target/ppc: Fix PMU MMCR0[PMCjCE] bit in hflags calculation,
Nicholas Piggin <=
[PATCH v3 3/9] target/ppc: Fix instruction loading endianness in alignment interrupt, Nicholas Piggin, 2023/05/15
[PATCH v3 4/9] target/ppc: Alignment faults do not set DSISR in ISA v3.0 onward, Nicholas Piggin, 2023/05/15
[PATCH v3 5/9] target/ppc: Change partition-scope translate interface, Nicholas Piggin, 2023/05/15
[PATCH v3 7/9] target/ppc: Implement HEIR SPR, Nicholas Piggin, 2023/05/15
[PATCH v3 8/9] target/ppc: Add ISA v3.1 LEV indication in SRR1 for system call interrupts, Nicholas Piggin, 2023/05/15
[PATCH v3 6/9] target/ppc: Add SRR1 prefix indication to interrupt handlers, Nicholas Piggin, 2023/05/15