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[PULL 35/60] ppc440: Change ppc460ex_pcie_init() parameter type
From: |
Daniel Henrique Barboza |
Subject: |
[PULL 35/60] ppc440: Change ppc460ex_pcie_init() parameter type |
Date: |
Fri, 7 Jul 2023 08:30:43 -0300 |
From: BALATON Zoltan <balaton@eik.bme.hu>
Change parameter of ppc460ex_pcie_init() from env to cpu to allow
further refactoring.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID:
<1695d7cc1a9f1070ab498c078916e2389d6e9469.1688586835.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
hw/ppc/ppc440.h | 2 +-
hw/ppc/ppc440_uc.c | 7 ++++---
hw/ppc/sam460ex.c | 2 +-
3 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/hw/ppc/ppc440.h b/hw/ppc/ppc440.h
index 7c24db8504..ae42bcf0c8 100644
--- a/hw/ppc/ppc440.h
+++ b/hw/ppc/ppc440.h
@@ -18,6 +18,6 @@ void ppc4xx_cpr_init(CPUPPCState *env);
void ppc4xx_sdr_init(CPUPPCState *env);
void ppc4xx_ahb_init(CPUPPCState *env);
void ppc4xx_dma_init(CPUPPCState *env, int dcr_base);
-void ppc460ex_pcie_init(CPUPPCState *env);
+void ppc460ex_pcie_init(PowerPCCPU *cpu);
#endif /* PPC440_H */
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index 651263926e..8eb985d714 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -17,6 +17,7 @@
#include "hw/qdev-properties.h"
#include "hw/pci/pci.h"
#include "sysemu/reset.h"
+#include "cpu.h"
#include "ppc440.h"
/*****************************************************************************/
@@ -1108,17 +1109,17 @@ static void
ppc460ex_pcie_register_dcrs(PPC460EXPCIEState *s, CPUPPCState *env)
&dcr_read_pcie, &dcr_write_pcie);
}
-void ppc460ex_pcie_init(CPUPPCState *env)
+void ppc460ex_pcie_init(PowerPCCPU *cpu)
{
DeviceState *dev;
dev = qdev_new(TYPE_PPC460EX_PCIE_HOST);
qdev_prop_set_int32(dev, "dcrn-base", DCRN_PCIE0_BASE);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
- ppc460ex_pcie_register_dcrs(PPC460EX_PCIE_HOST(dev), env);
+ ppc460ex_pcie_register_dcrs(PPC460EX_PCIE_HOST(dev), &cpu->env);
dev = qdev_new(TYPE_PPC460EX_PCIE_HOST);
qdev_prop_set_int32(dev, "dcrn-base", DCRN_PCIE1_BASE);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
- ppc460ex_pcie_register_dcrs(PPC460EX_PCIE_HOST(dev), env);
+ ppc460ex_pcie_register_dcrs(PPC460EX_PCIE_HOST(dev), &cpu->env);
}
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index cf065aae0e..aaa8d2f4a5 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -422,7 +422,7 @@ static void sam460ex_init(MachineState *machine)
usb_create_simple(usb_bus_find(-1), "usb-mouse");
/* PCI bus */
- ppc460ex_pcie_init(env);
+ ppc460ex_pcie_init(cpu);
/* All PCI irqs are connected to the same UIC pin (cf. UBoot source) */
dev = sysbus_create_simple("ppc440-pcix-host", 0xc0ec00000,
qdev_get_gpio_in(uic[1], 0));
--
2.41.0
- [PULL 25/60] ppc/pnv: Add P10 core xscom model, (continued)
- [PULL 25/60] ppc/pnv: Add P10 core xscom model, Daniel Henrique Barboza, 2023/07/07
- [PULL 26/60] ppc/pnv: Return zero for core thread state xscom, Daniel Henrique Barboza, 2023/07/07
- [PULL 27/60] pnv/xive: Allow mmio operations of any size on the ESB CI pages, Daniel Henrique Barboza, 2023/07/07
- [PULL 28/60] ppc/pegasos2: Add support for -initrd command line option, Daniel Henrique Barboza, 2023/07/07
- [PULL 29/60] pnv/xive: Print CPU target in all TIMA traces, Daniel Henrique Barboza, 2023/07/07
- [PULL 30/60] pnv/xive2: Always pass a presenter object when accessing the TIMA, Daniel Henrique Barboza, 2023/07/07
- [PULL 31/60] target/ppc: Add LPAR-per-core vs per-thread mode flag, Daniel Henrique Barboza, 2023/07/07
- [PULL 32/60] target/ppc: SMT support for the HID SPR, Daniel Henrique Barboza, 2023/07/07
- [PULL 33/60] ppc/pnv: SMT support for powernv, Daniel Henrique Barboza, 2023/07/07
- [PULL 34/60] tests/avocado: Add powernv machine test script, Daniel Henrique Barboza, 2023/07/07
- [PULL 35/60] ppc440: Change ppc460ex_pcie_init() parameter type,
Daniel Henrique Barboza <=
- [PULL 36/60] ppc440: Add cpu link property to PCIe controller model, Daniel Henrique Barboza, 2023/07/07
- [PULL 37/60] ppc440: Add a macro to shorten PCIe controller DCR registration, Daniel Henrique Barboza, 2023/07/07
- [PULL 38/60] ppc440: Rename parent field of PPC460EXPCIEState to match code style, Daniel Henrique Barboza, 2023/07/07
- [PULL 40/60] ppc440: Stop using system io region for PCIe buses, Daniel Henrique Barboza, 2023/07/07
- [PULL 41/60] ppc440: Add busnum property to PCIe controller model, Daniel Henrique Barboza, 2023/07/07
- [PULL 39/60] ppc440: Rename local variable in dcr_read_pcie(), Daniel Henrique Barboza, 2023/07/07
- [PULL 43/60] ppc/sam460ex: Remove address_space_mem local variable, Daniel Henrique Barboza, 2023/07/07
- [PULL 44/60] ppc440_pcix: Don't use iomem for regs, Daniel Henrique Barboza, 2023/07/07
- [PULL 42/60] ppc440: Remove ppc460ex_pcie_init legacy init function, Daniel Henrique Barboza, 2023/07/07
- [PULL 45/60] ppc440_pcix: Stop using system io region for PCI bus, Daniel Henrique Barboza, 2023/07/07