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[PULL 30/60] pnv/xive2: Always pass a presenter object when accessing th
From: |
Daniel Henrique Barboza |
Subject: |
[PULL 30/60] pnv/xive2: Always pass a presenter object when accessing the TIMA |
Date: |
Fri, 7 Jul 2023 08:30:38 -0300 |
From: Frederic Barrat <fbarrat@linux.ibm.com>
The low-level functions to access the TIMA take a presenter object as
a first argument. When accessing the TIMA from the IC BAR,
i.e. indirect calls, we currently pass a NULL pointer for the
presenter argument. While it appears ok with the current usage, it's
dangerous. And it's pretty easy to figure out the presenter in that
context, so this patch fixes it.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-ID: <20230705081400.218408-1-fbarrat@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
hw/intc/pnv_xive2.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index 82fcd3ea22..bbb44a533c 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -1624,6 +1624,7 @@ static uint64_t pnv_xive2_ic_tm_indirect_read(void
*opaque, hwaddr offset,
unsigned size)
{
PnvXive2 *xive = PNV_XIVE2(opaque);
+ XivePresenter *xptr = XIVE_PRESENTER(xive);
hwaddr hw_page_offset;
uint32_t pir;
XiveTCTX *tctx;
@@ -1633,7 +1634,7 @@ static uint64_t pnv_xive2_ic_tm_indirect_read(void
*opaque, hwaddr offset,
hw_page_offset = pnv_xive2_ic_tm_get_hw_page_offset(xive, offset);
tctx = pnv_xive2_get_indirect_tctx(xive, pir);
if (tctx) {
- val = xive_tctx_tm_read(NULL, tctx, hw_page_offset, size);
+ val = xive_tctx_tm_read(xptr, tctx, hw_page_offset, size);
}
return val;
@@ -1643,6 +1644,7 @@ static void pnv_xive2_ic_tm_indirect_write(void *opaque,
hwaddr offset,
uint64_t val, unsigned size)
{
PnvXive2 *xive = PNV_XIVE2(opaque);
+ XivePresenter *xptr = XIVE_PRESENTER(xive);
hwaddr hw_page_offset;
uint32_t pir;
XiveTCTX *tctx;
@@ -1651,7 +1653,7 @@ static void pnv_xive2_ic_tm_indirect_write(void *opaque,
hwaddr offset,
hw_page_offset = pnv_xive2_ic_tm_get_hw_page_offset(xive, offset);
tctx = pnv_xive2_get_indirect_tctx(xive, pir);
if (tctx) {
- xive_tctx_tm_write(NULL, tctx, hw_page_offset, val, size);
+ xive_tctx_tm_write(xptr, tctx, hw_page_offset, val, size);
}
}
--
2.41.0
- [PULL 20/60] pnv/xive: Add property on xive sources to define PQ state on reset, (continued)
- [PULL 20/60] pnv/xive: Add property on xive sources to define PQ state on reset, Daniel Henrique Barboza, 2023/07/07
- [PULL 21/60] pnv/psi: Initialize the PSIHB interrupts to match hardware, Daniel Henrique Barboza, 2023/07/07
- [PULL 22/60] ppc/pnv: quad xscom callbacks are P9 specific, Daniel Henrique Barboza, 2023/07/07
- [PULL 23/60] ppc/pnv: Subclass quad xscom callbacks, Daniel Henrique Barboza, 2023/07/07
- [PULL 24/60] ppc/pnv: Add P10 quad xscom model, Daniel Henrique Barboza, 2023/07/07
- [PULL 25/60] ppc/pnv: Add P10 core xscom model, Daniel Henrique Barboza, 2023/07/07
- [PULL 26/60] ppc/pnv: Return zero for core thread state xscom, Daniel Henrique Barboza, 2023/07/07
- [PULL 27/60] pnv/xive: Allow mmio operations of any size on the ESB CI pages, Daniel Henrique Barboza, 2023/07/07
- [PULL 28/60] ppc/pegasos2: Add support for -initrd command line option, Daniel Henrique Barboza, 2023/07/07
- [PULL 29/60] pnv/xive: Print CPU target in all TIMA traces, Daniel Henrique Barboza, 2023/07/07
- [PULL 30/60] pnv/xive2: Always pass a presenter object when accessing the TIMA,
Daniel Henrique Barboza <=
- [PULL 31/60] target/ppc: Add LPAR-per-core vs per-thread mode flag, Daniel Henrique Barboza, 2023/07/07
- [PULL 32/60] target/ppc: SMT support for the HID SPR, Daniel Henrique Barboza, 2023/07/07
- [PULL 33/60] ppc/pnv: SMT support for powernv, Daniel Henrique Barboza, 2023/07/07
- [PULL 34/60] tests/avocado: Add powernv machine test script, Daniel Henrique Barboza, 2023/07/07
- [PULL 35/60] ppc440: Change ppc460ex_pcie_init() parameter type, Daniel Henrique Barboza, 2023/07/07
- [PULL 36/60] ppc440: Add cpu link property to PCIe controller model, Daniel Henrique Barboza, 2023/07/07
- [PULL 37/60] ppc440: Add a macro to shorten PCIe controller DCR registration, Daniel Henrique Barboza, 2023/07/07
- [PULL 38/60] ppc440: Rename parent field of PPC460EXPCIEState to match code style, Daniel Henrique Barboza, 2023/07/07
- [PULL 40/60] ppc440: Stop using system io region for PCIe buses, Daniel Henrique Barboza, 2023/07/07
- [PULL 41/60] ppc440: Add busnum property to PCIe controller model, Daniel Henrique Barboza, 2023/07/07