Re: [PATCH v9 4/7] hw/isa/vt82c686: Implement PCI IRQ routing

[Philippe Mathieu-Daudé]

On 30/10/23 10:02, BALATON Zoltan wrote:
> On Mon, 30 Oct 2023, Philippe Mathieu-Daudé wrote:
> > On 7/3/23 12:42, BALATON Zoltan wrote:
> > > The real VIA south bridges implement a PCI IRQ router which is 
> > > configured
> > > by the BIOS or the OS. In order to respect these configurations, QEMU
> > > needs to implement it as well. The real chip may allow routing IRQs from
> > > internal functions independently of PCI interrupts but since guests
> > > usually configute it to a single shared interrupt we don't model that
> > > here for simplicity.
> > >
> > > Note: The implementation was taken from piix4_set_irq() in hw/isa/piix4.
> > >
> > > Suggested-by: Bernhard Beschow <shentey@gmail.com>
> > > Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> > > Reviewed-by: Bernhard Beschow <shentey@gmail.com>
> > > Tested-by: Rene Engel <ReneEngel80@emailn.de>
> > > ---
> > >   hw/isa/vt82c686.c | 42 ++++++++++++++++++++++++++++++++++++++++++
> > >   1 file changed, 42 insertions(+)
> >
> >
> > > +static int via_isa_get_pci_irq(const ViaISAState *s, int irq_num)
> > > +{
> > > +    switch (irq_num) {
> > > +    case 0:
> > > +        return s->dev.config[0x55] >> 4;
> > > +    case 1:
> > > +        return s->dev.config[0x56] & 0xf;
> > > +    case 2:
> > > +        return s->dev.config[0x56] >> 4;
> > > +    case 3:
> > > +        return s->dev.config[0x57] >> 4;
> >
> > Shouldn't this be & 0xf?
>
> No, the INTD value is actually in the high byte of reg 0x57. See e.g. 
> page 73 in the VT8231 doc Revision 2.32.

Correct (I was looking at rev 0.8 which is incomplete there).

Thanks,

Phil.