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[PULL 25/47] ppc/pnv: Wire up pca9552 GPIO pins for PCIe hotplug power c
From: |
Nicholas Piggin |
Subject: |
[PULL 25/47] ppc/pnv: Wire up pca9552 GPIO pins for PCIe hotplug power control |
Date: |
Sat, 24 Feb 2024 01:41:44 +1000 |
From: Glenn Miles <milesg@linux.vnet.ibm.com>
For power10-rainier, a pca9552 device is used for PCIe slot hotplug
power control by the Power Hypervisor code. The code expects that
some time after it enables power to a PCIe slot by asserting one of
the pca9552 GPIO pins 0-4, it should see a "power good" signal asserted
on one of pca9552 GPIO pins 5-9.
To simulate this behavior, we simply connect the GPIO outputs for
pins 0-4 to the GPIO inputs for pins 5-9.
Each PCIe slot is assigned 3 GPIO pins on the pca9552 device, for
control of up to 5 PCIe slots. The per-slot signal names are:
SLOTx_EN.......PHYP uses this as an output to enable
slot power. We connect this to the
SLOTx_PG pin to simulate a PGOOD signal.
SLOTx_PG.......PHYP uses this as in input to detect
PGOOD for the slot. For our purposes
we just connect this to the SLOTx_EN
output.
SLOTx_Control..PHYP uses this as an output to prevent
a race condition in the real hotplug
circuitry, but we can ignore this output
for simulation.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
hw/ppc/pnv.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 78f5c6262a..97bdfb2d1e 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1900,7 +1900,19 @@ static void pnv_rainier_i2c_init(PnvMachineState *pnv)
* Add a PCA9552 I2C device for PCIe hotplug control
* to engine 2, bus 1, address 0x63
*/
- i2c_slave_create_simple(chip10->i2c[2].busses[1], "pca9552", 0x63);
+ I2CSlave *dev = i2c_slave_create_simple(chip10->i2c[2].busses[1],
+ "pca9552", 0x63);
+
+ /*
+ * Connect PCA9552 GPIO pins 0-4 (SLOTx_EN) outputs to GPIO pins 5-9
+ * (SLOTx_PG) inputs in order to fake the pgood state of PCIe slots
+ * after hypervisor code sets a SLOTx_EN pin high.
+ */
+ qdev_connect_gpio_out(DEVICE(dev), 0, qdev_get_gpio_in(DEVICE(dev),
5));
+ qdev_connect_gpio_out(DEVICE(dev), 1, qdev_get_gpio_in(DEVICE(dev),
6));
+ qdev_connect_gpio_out(DEVICE(dev), 2, qdev_get_gpio_in(DEVICE(dev),
7));
+ qdev_connect_gpio_out(DEVICE(dev), 3, qdev_get_gpio_in(DEVICE(dev),
8));
+ qdev_connect_gpio_out(DEVICE(dev), 4, qdev_get_gpio_in(DEVICE(dev),
9));
}
}
--
2.42.0
- [PULL 17/47] ppc/spapr: Initialize max_cpus limit to SPAPR_IRQ_NR_IPIS., (continued)
- [PULL 17/47] ppc/spapr: Initialize max_cpus limit to SPAPR_IRQ_NR_IPIS., Nicholas Piggin, 2024/02/23
- [PULL 19/47] spapr: Tag pseries-2.1 - 2.11 machines as deprecated, Nicholas Piggin, 2024/02/23
- [PULL 29/47] ppc/pnv: Test pnv i2c master and connected devices, Nicholas Piggin, 2024/02/23
- [PULL 32/47] hw/ppc: N1 chiplet wiring, Nicholas Piggin, 2024/02/23
- [PULL 35/47] target/ppc: Improve timebase register defines naming, Nicholas Piggin, 2024/02/23
- [PULL 33/47] target/ppc: Update gdbstub to read SPR's CFAR, DEC, HDEC, TB-L/U, Nicholas Piggin, 2024/02/23
- [PULL 37/47] ppc/pnv: Add POWER9/10 chiptod model, Nicholas Piggin, 2024/02/23
- [PULL 05/47] tests/avocado: ppc add powernv10 boot_linux_console test, Nicholas Piggin, 2024/02/23
- [PULL 16/47] ppc/spapr: Introduce SPAPR_IRQ_NR_IPIS to refer IRQ range for CPU IPIs., Nicholas Piggin, 2024/02/23
- [PULL 18/47] ppc/spapr: change pseries machine default to POWER10 CPU, Nicholas Piggin, 2024/02/23
- [PULL 25/47] ppc/pnv: Wire up pca9552 GPIO pins for PCIe hotplug power control,
Nicholas Piggin <=
- [PULL 26/47] ppc/pnv: Use resettable interface to reset child I2C buses, Nicholas Piggin, 2024/02/23
- [PULL 28/47] ppc/pnv: Add a pca9554 I2C device to powernv10-rainier, Nicholas Piggin, 2024/02/23
- [PULL 30/47] hw/ppc: Add pnv nest pervasive common chiplet model, Nicholas Piggin, 2024/02/23
- [PULL 43/47] target/ppc: Factor out 4xx ppcemb_tlb_t flushing, Nicholas Piggin, 2024/02/23
- [PULL 42/47] target/ppc: Fix 440 tlbwe TLB invalidation gaps, Nicholas Piggin, 2024/02/23
- [PULL 39/47] ppc/pnv: Implement the ChipTOD to Core transfer, Nicholas Piggin, 2024/02/23
- [PULL 45/47] target/ppc: 4xx optimise tlbwe_lo TLB flushing, Nicholas Piggin, 2024/02/23
- [PULL 31/47] hw/ppc: Add N1 chiplet model, Nicholas Piggin, 2024/02/23
- [PULL 41/47] target/ppc: Add SMT support to time facilities, Nicholas Piggin, 2024/02/23
- [PULL 36/47] target/ppc: Fix move-to timebase SPR access permissions, Nicholas Piggin, 2024/02/23