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[PULL 42/47] target/ppc: Fix 440 tlbwe TLB invalidation gaps
From: |
Nicholas Piggin |
Subject: |
[PULL 42/47] target/ppc: Fix 440 tlbwe TLB invalidation gaps |
Date: |
Sat, 24 Feb 2024 01:42:01 +1000 |
The 440 tlbwe (write entry) instruction misses several cases that must
flush the TCG TLB:
- If the new size is smaller than the existing size, the EA no longer
covered should be flushed. This looks like an inverted inequality
test.
- If the TLB PID changes.
- If the TLB attr bit 0 (translation address space) changes.
- If low prot (access control) bits change.
Fix this by removing tricks to avoid TLB flushes, and just invalidate
the TLB if any valid entry is being changed, similarly to 4xx.
Optimisations will be introduced in subsequent changes.
Tested-by: BALATON Zoltan <balaton@eik.bme.hu>
Acked-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
target/ppc/mmu_helper.c | 35 ++++++++++-------------------------
1 file changed, 10 insertions(+), 25 deletions(-)
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index f87d35379a..c140f3c96d 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -855,49 +855,34 @@ void helper_440_tlbwe(CPUPPCState *env, uint32_t word,
target_ulong entry,
target_ulong value)
{
ppcemb_tlb_t *tlb;
- target_ulong EPN, RPN, size;
- int do_flush_tlbs;
qemu_log_mask(CPU_LOG_MMU, "%s word %d entry %d value " TARGET_FMT_lx "\n",
__func__, word, (int)entry, value);
- do_flush_tlbs = 0;
entry &= 0x3F;
tlb = &env->tlb.tlbe[entry];
+
+ /* Invalidate previous TLB (if it's valid) */
+ if (tlb->prot & PAGE_VALID) {
+ tlb_flush(env_cpu(env));
+ }
+
switch (word) {
default:
/* Just here to please gcc */
case 0:
- EPN = value & 0xFFFFFC00;
- if ((tlb->prot & PAGE_VALID) && EPN != tlb->EPN) {
- do_flush_tlbs = 1;
- }
- tlb->EPN = EPN;
- size = booke_tlb_to_page_size((value >> 4) & 0xF);
- if ((tlb->prot & PAGE_VALID) && tlb->size < size) {
- do_flush_tlbs = 1;
- }
- tlb->size = size;
+ tlb->EPN = value & 0xFFFFFC00;
+ tlb->size = booke_tlb_to_page_size((value >> 4) & 0xF);
tlb->attr &= ~0x1;
tlb->attr |= (value >> 8) & 1;
if (value & 0x200) {
tlb->prot |= PAGE_VALID;
} else {
- if (tlb->prot & PAGE_VALID) {
- tlb->prot &= ~PAGE_VALID;
- do_flush_tlbs = 1;
- }
+ tlb->prot &= ~PAGE_VALID;
}
tlb->PID = env->spr[SPR_440_MMUCR] & 0x000000FF;
- if (do_flush_tlbs) {
- tlb_flush(env_cpu(env));
- }
break;
case 1:
- RPN = value & 0xFFFFFC0F;
- if ((tlb->prot & PAGE_VALID) && tlb->RPN != RPN) {
- tlb_flush(env_cpu(env));
- }
- tlb->RPN = RPN;
+ tlb->RPN = value & 0xFFFFFC0F;
break;
case 2:
tlb->attr = (tlb->attr & 0x1) | (value & 0x0000FF00);
--
2.42.0
- [PULL 33/47] target/ppc: Update gdbstub to read SPR's CFAR, DEC, HDEC, TB-L/U, (continued)
- [PULL 33/47] target/ppc: Update gdbstub to read SPR's CFAR, DEC, HDEC, TB-L/U, Nicholas Piggin, 2024/02/23
- [PULL 37/47] ppc/pnv: Add POWER9/10 chiptod model, Nicholas Piggin, 2024/02/23
- [PULL 05/47] tests/avocado: ppc add powernv10 boot_linux_console test, Nicholas Piggin, 2024/02/23
- [PULL 16/47] ppc/spapr: Introduce SPAPR_IRQ_NR_IPIS to refer IRQ range for CPU IPIs., Nicholas Piggin, 2024/02/23
- [PULL 18/47] ppc/spapr: change pseries machine default to POWER10 CPU, Nicholas Piggin, 2024/02/23
- [PULL 25/47] ppc/pnv: Wire up pca9552 GPIO pins for PCIe hotplug power control, Nicholas Piggin, 2024/02/23
- [PULL 26/47] ppc/pnv: Use resettable interface to reset child I2C buses, Nicholas Piggin, 2024/02/23
- [PULL 28/47] ppc/pnv: Add a pca9554 I2C device to powernv10-rainier, Nicholas Piggin, 2024/02/23
- [PULL 30/47] hw/ppc: Add pnv nest pervasive common chiplet model, Nicholas Piggin, 2024/02/23
- [PULL 43/47] target/ppc: Factor out 4xx ppcemb_tlb_t flushing, Nicholas Piggin, 2024/02/23
- [PULL 42/47] target/ppc: Fix 440 tlbwe TLB invalidation gaps,
Nicholas Piggin <=
- [PULL 39/47] ppc/pnv: Implement the ChipTOD to Core transfer, Nicholas Piggin, 2024/02/23
- [PULL 45/47] target/ppc: 4xx optimise tlbwe_lo TLB flushing, Nicholas Piggin, 2024/02/23
- [PULL 31/47] hw/ppc: Add N1 chiplet model, Nicholas Piggin, 2024/02/23
- [PULL 41/47] target/ppc: Add SMT support to time facilities, Nicholas Piggin, 2024/02/23
- [PULL 36/47] target/ppc: Fix move-to timebase SPR access permissions, Nicholas Piggin, 2024/02/23
- [PULL 46/47] target/ppc: 440 optimise tlbwe TLB flushing, Nicholas Piggin, 2024/02/23
- [PULL 44/47] target/ppc: 4xx don't flush TLB for a newly written software TLB entry, Nicholas Piggin, 2024/02/23
- [PULL 04/47] tests/avocado: improve flaky ppc/pnv boot_linux_console.py test, Nicholas Piggin, 2024/02/23
- [PULL 07/47] tests/avocado: Add pseries KVM boot_linux test, Nicholas Piggin, 2024/02/23
- [PULL 08/47] tests/avocado: ppc add hypervisor tests, Nicholas Piggin, 2024/02/23