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Re: [Qemu-riscv] [PATCH for-3.2 v7 3/6] hw/riscv/virt: Connect the gpex
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From: |
Alistair Francis |
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Subject: |
Re: [Qemu-riscv] [PATCH for-3.2 v7 3/6] hw/riscv/virt: Connect the gpex PCIe |
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Date: |
Wed, 21 Nov 2018 10:21:19 -0800 |
On Wed, Nov 21, 2018 at 10:01 AM Logan Gunthorpe <address@hidden> wrote:
>
>
>
> On 2018-11-21 10:02 a.m., Alistair Francis wrote:
> > Signed-off-by: Alistair Francis <address@hidden>
> > Signed-off-by: Logan Gunthorpe <address@hidden>
>
> Reviewed-by: Logan Gunthorpe <address@hidden>
>
>
> > diff --git a/default-configs/riscv32-softmmu.mak
> > b/default-configs/riscv32-softmmu.mak
> > index 7937c69e22..3e3d195f37 100644
> > --- a/default-configs/riscv32-softmmu.mak
> > +++ b/default-configs/riscv32-softmmu.mak
> > @@ -1,7 +1,11 @@
> > # Default configuration for riscv-softmmu
> >
> > +include pci.mak
> > +
> > CONFIG_SERIAL=y
> > CONFIG_VIRTIO_MMIO=y
> > -include virtio.mak
> >
> > CONFIG_CADENCE=y
> > +
> > +CONFIG_PCI_GENERIC=y
> > +CONFIG_PCI_XILINX=y
>
> Nit: should PCI_XILINX not be in patch 5? It's not used in this patch
> and was a bit confusing when reviewing.
It probably should be, I have moved it.
Alistair
>
> Logan
- [Qemu-riscv] [PATCH for-3.2 v7 0/6] Connect a PCIe host and graphics support to RISC-V, Alistair Francis, 2018/11/21
- [Qemu-riscv] [PATCH for-3.2 v7 3/6] hw/riscv/virt: Connect the gpex PCIe, Alistair Francis, 2018/11/21
- [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Logan Gunthorpe, 2018/11/21
[Qemu-riscv] [PATCH for-3.2 v7 4/6] riscv: Enable VGA and PCIE_VGA, Alistair Francis, 2018/11/21