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Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the numb
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From: |
Logan Gunthorpe |
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Subject: |
Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts |
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Date: |
Wed, 21 Nov 2018 10:58:35 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 |
On 2018-11-21 10:02 a.m., Alistair Francis wrote:
> Increase the number of interrupts to match the HiFive Unleashed board.
>
> Signed-off-by: Alistair Francis <address@hidden>
> ---
> include/hw/riscv/virt.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
> index 91163d6cbf..7cb2742070 100644
> --- a/include/hw/riscv/virt.h
> +++ b/include/hw/riscv/virt.h
> @@ -45,7 +45,7 @@ enum {
> UART0_IRQ = 10,
> VIRTIO_IRQ = 1, /* 1 to 8 */
> VIRTIO_COUNT = 8,
> - VIRTIO_NDEV = 10
> + VIRTIO_NDEV = 0x35
Why 0x35? Based on the PCI patch we are using only 36 interrupts, not 53...
Logan
- [Qemu-riscv] [PATCH for-3.2 v7 0/6] Connect a PCIe host and graphics support to RISC-V, Alistair Francis, 2018/11/21
- [Qemu-riscv] [PATCH for-3.2 v7 3/6] hw/riscv/virt: Connect the gpex PCIe, Alistair Francis, 2018/11/21
- [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts,
Logan Gunthorpe <=
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Logan Gunthorpe, 2018/11/21
[Qemu-riscv] [PATCH for-3.2 v7 4/6] riscv: Enable VGA and PCIE_VGA, Alistair Francis, 2018/11/21
[Qemu-riscv] [PATCH for-3.2 v7 2/6] hw/riscv/virt: Adjust memory layout spacing, Alistair Francis, 2018/11/21