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Re: [PATCH v5 09/60] target/riscv: vector single-width integer add and s


From: Richard Henderson
Subject: Re: [PATCH v5 09/60] target/riscv: vector single-width integer add and subtract
Date: Mon, 23 Mar 2020 10:46:53 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1

On 3/23/20 1:10 AM, LIU Zhiwei wrote:
>> static void gen_gvec_rsubi(unsigned vece, uint32_t dofs,
>>     uint32_t aofs, int64_t c,
>>     uint32_t oprsz, uint32_t maxsz)
>> {
>>     tcg_debug_assert(vece <= MO_64);
>>     tcg_gen_gvec_2i(dofs, aofs, oprsz, maxsz, c, &rsub_op[vece]);
>> }
> Hi Richard,
> 
> When I try to add GVEC IR rsubs,I find it is some difficult to keep it
> separate from tcg-runtime-gvec.c.
> 
> The .fno functions, e.g.,  gen_helper_gvec_rsubs8  need to be defined like
> 
>     void HELPER(gvec_subs8)(void *d, void *a, uint64_t b, uint32_t desc)
> 
>     {
> 
>         intptr_t oprsz = simd_oprsz(desc);
> 
>         vec8 vecb = (vec8)DUP16(b);
> 
>         intptr_t i;
> 
>         for (i = 0; i < oprsz; i += sizeof(vec8)) {
> 
>             *(vec8 *)(d + i) = vecb - *(vec8 *)(a + i);
> 
>         }
> 
>         clear_high(d, oprsz, desc);
> 
>     }
> 
>    
> The vec8 and DUP are defined in tcg-runtime-gvec.c. 

Update your branch -- they're gone since commit 0a83e43a9ee6.
Just use normal integer types.


r~



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