Re: [PATCH v6 39/61] target/riscv: vector floating-point compare instruc

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Re: [PATCH v6 39/61] target/riscv: vector floating-point compare instruc

From:	LIU Zhiwei
Subject:	Re: [PATCH v6 39/61] target/riscv: vector floating-point compare instructions
Date:	Sat, 28 Mar 2020 23:44:58 +0800
User-agent:	Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0



On 2020/3/28 10:01, Richard Henderson wrote:

On 3/17/20 8:06 AM, LIU Zhiwei wrote:

+static uint8_t vmfne16(uint16_t a, uint16_t b, float_status *s)
+{
+    int compare = float16_compare_quiet(a, b, s);
+    return compare != float_relation_equal &&
+           compare != float_relation_unordered;
+}
+
+static uint8_t vmfne32(uint32_t a, uint32_t b, float_status *s)
+{
+    int compare = float32_compare_quiet(a, b, s);
+    return compare != float_relation_equal &&
+           compare != float_relation_unordered;
+}
+
+static uint8_t vmfne64(uint64_t a, uint64_t b, float_status *s)
+{
+    int compare = float64_compare_quiet(a, b, s);
+    return compare != float_relation_equal &&
+           compare != float_relation_unordered;
+}

This is incorrect -- the result should be true for unordered.  The text for
0.7.1 does not specify, but this is the normal interpretation of NE.  The text
for 0.8 explicitly says that the result is 1 for NaN.

Agree! Thanks for pointing that. IEEE-754 has not defined the NE.
An opposite setting with EQ is reasonable.

Zhiwei

r~

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Re: [PATCH v6 32/61] target/riscv: vector single-width floating-point multiply/divide instructions, (continued)
- [PATCH v6 33/61] target/riscv: vector widening floating-point multiply, LIU Zhiwei, 2020/03/17
- [PATCH v6 34/61] target/riscv: vector single-width floating-point fused multiply-add instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 35/61] target/riscv: vector widening floating-point fused multiply-add instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 36/61] target/riscv: vector floating-point square-root instruction, LIU Zhiwei, 2020/03/17
- [PATCH v6 37/61] target/riscv: vector floating-point min/max instructions, LIU Zhiwei, 2020/03/17
  - Re: [PATCH v6 37/61] target/riscv: vector floating-point min/max instructions, Alistair Francis, 2020/03/25
- [PATCH v6 38/61] target/riscv: vector floating-point sign-injection instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 39/61] target/riscv: vector floating-point compare instructions, LIU Zhiwei, 2020/03/17
  - Re: [PATCH v6 39/61] target/riscv: vector floating-point compare instructions, Richard Henderson, 2020/03/27
    - Re: [PATCH v6 39/61] target/riscv: vector floating-point compare instructions, LIU Zhiwei <=
- [PATCH v6 40/61] target/riscv: vector floating-point classify instructions, LIU Zhiwei, 2020/03/17
  - Re: [PATCH v6 40/61] target/riscv: vector floating-point classify instructions, Richard Henderson, 2020/03/27
- [PATCH v6 41/61] target/riscv: vector floating-point merge instructions, LIU Zhiwei, 2020/03/17
  - Re: [PATCH v6 41/61] target/riscv: vector floating-point merge instructions, Richard Henderson, 2020/03/27
    - Re: [PATCH v6 41/61] target/riscv: vector floating-point merge instructions, LIU Zhiwei, 2020/03/28
- [PATCH v6 42/61] target/riscv: vector floating-point/integer type-convert instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 43/61] target/riscv: widening floating-point/integer type-convert instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 44/61] target/riscv: narrowing floating-point/integer type-convert instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 45/61] target/riscv: vector single-width integer reduction instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 46/61] target/riscv: vector wideing integer reduction instructions, LIU Zhiwei, 2020/03/17

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