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Re: [PATCH v6 41/61] target/riscv: vector floating-point merge instructi
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From: |
Richard Henderson |
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Subject: |
Re: [PATCH v6 41/61] target/riscv: vector floating-point merge instructions |
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Date: |
Fri, 27 Mar 2020 20:23:27 -0700 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 |
On 3/17/20 8:06 AM, LIU Zhiwei wrote:
> + for (i = 0; i < vl; i++) { \
> + if (!vm && !vext_elem_mask(v0, mlen, i)) { \
> + ETYPE s2 = *((ETYPE *)vs2 + H(i)); \
> + *((ETYPE *)vd + H1(i)) = s2; \
H1 should be H.
> + } else { \
> + *((ETYPE *)vd + H(i)) = (ETYPE)s1; \
> + } \
You can also hoist the s2 dereference out of the IF, and let the assignment be
unconditional.
*((ETYPE *)vd + H(i))
= (!vm && !vext_elem_mask(v0, mlen, i) ? s2 : s1);
r~
- [PATCH v6 36/61] target/riscv: vector floating-point square-root instruction, (continued)
- [PATCH v6 36/61] target/riscv: vector floating-point square-root instruction, LIU Zhiwei, 2020/03/17
- [PATCH v6 37/61] target/riscv: vector floating-point min/max instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 38/61] target/riscv: vector floating-point sign-injection instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 39/61] target/riscv: vector floating-point compare instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 40/61] target/riscv: vector floating-point classify instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 41/61] target/riscv: vector floating-point merge instructions, LIU Zhiwei, 2020/03/17
- Re: [PATCH v6 41/61] target/riscv: vector floating-point merge instructions,
Richard Henderson <=
- [PATCH v6 42/61] target/riscv: vector floating-point/integer type-convert instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 43/61] target/riscv: widening floating-point/integer type-convert instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 44/61] target/riscv: narrowing floating-point/integer type-convert instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 45/61] target/riscv: vector single-width integer reduction instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 46/61] target/riscv: vector wideing integer reduction instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 47/61] target/riscv: vector single-width floating-point reduction instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 48/61] target/riscv: vector widening floating-point reduction instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 49/61] target/riscv: vector mask-register logical instructions, LIU Zhiwei, 2020/03/17
- [PATCH v6 50/61] target/riscv: vector mask population count vmpopc, LIU Zhiwei, 2020/03/17