qemu-riscv
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [RFC PATCH v3 2/2] Adding preliminary custom/vendor CSR handling mec


From: Richard Henderson
Subject: Re: [RFC PATCH v3 2/2] Adding preliminary custom/vendor CSR handling mechanism
Date: Thu, 10 Jun 2021 09:19:38 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1

On 6/10/21 7:44 AM, Ruinland Chuan-Tzu Tsai wrote:
--- /dev/null
+++ b/target/riscv/andes_cpu_bits.h
@@ -0,0 +1,113 @@
+/* ========= AndeStar V5 machine mode CSRs ========= */

--- /dev/null
+++ b/target/riscv/csr_andes.inc.c
@@ -0,0 +1,153 @@
+/* Andes Custom Registers */

--- /dev/null
+++ b/target/riscv/custom_cpu_bits.h
@@ -0,0 +1,3 @@
+//XXX Maybe we should introduce a configure option to toggle different vendor
+// CSR bits definition ?
+#include "andes_cpu_bits.h"

All new files must have copyright+license boilerplate.


r~



reply via email to

[Prev in Thread] Current Thread [Next in Thread]