Re: [PATCH v2 09/14] target/riscv: Relax debug check for pm write

qemu-riscv

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Re: [PATCH v2 09/14] target/riscv: Relax debug check for pm write

From:	Richard Henderson
Subject:	Re: [PATCH v2 09/14] target/riscv: Relax debug check for pm write
Date:	Wed, 10 Nov 2021 12:31:50 +0100
User-agent:	Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0

On 11/10/21 8:04 AM, LIU Zhiwei wrote:

Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
---
  target/riscv/csr.c | 3 +++
  1 file changed, 3 insertions(+)

diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 9f41954894..74c0b788fd 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -1445,6 +1445,9 @@ static bool check_pm_current_disabled(CPURISCVState *env, 
int csrno)
      int csr_priv = get_field(csrno, 0x300);
      int pm_current;

+ if (env->debugger) {

+        return false;
+    }
      /*
       * If priv lvls differ that means we're accessing csr from higher priv 
lvl,
       * so allow the access


Seems reasonable.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

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[PATCH v2 05/14] target/riscv: Calculate address according to XLEN, (continued)
- [PATCH v2 05/14] target/riscv: Calculate address according to XLEN, LIU Zhiwei, 2021/11/10
  - Re: [PATCH v2 05/14] target/riscv: Calculate address according to XLEN, Richard Henderson, 2021/11/10
    - Re: [PATCH v2 05/14] target/riscv: Calculate address according to XLEN, LIU Zhiwei, 2021/11/10
    - Re: [PATCH v2 05/14] target/riscv: Calculate address according to XLEN, Richard Henderson, 2021/11/10
    - Re: [PATCH v2 05/14] target/riscv: Calculate address according to XLEN, LIU Zhiwei, 2021/11/11
- [PATCH v2 06/14] target/riscv: Adjust vsetvl according to XLEN, LIU Zhiwei, 2021/11/10
- [PATCH v2 07/14] target/riscv: Ajdust vector atomic check with XLEN, LIU Zhiwei, 2021/11/10
  - Re: [PATCH v2 07/14] target/riscv: Ajdust vector atomic check with XLEN, Richard Henderson, 2021/11/10
- [PATCH v2 08/14] target/riscv: Fix check range for first fault only, LIU Zhiwei, 2021/11/10
- [PATCH v2 09/14] target/riscv: Relax debug check for pm write, LIU Zhiwei, 2021/11/10
  - Re: [PATCH v2 09/14] target/riscv: Relax debug check for pm write, Richard Henderson <=
- [PATCH v2 10/14] target/riscv: Adjust vector address with mask, LIU Zhiwei, 2021/11/10
  - Re: [PATCH v2 10/14] target/riscv: Adjust vector address with mask, Richard Henderson, 2021/11/10
    - Re: [PATCH v2 10/14] target/riscv: Adjust vector address with mask, LIU Zhiwei, 2021/11/10
    - Re: [PATCH v2 10/14] target/riscv: Adjust vector address with mask, Richard Henderson, 2021/11/10
- [PATCH v2 11/14] target/riscv: Adjust scalar reg in vector with XLEN, LIU Zhiwei, 2021/11/10
  - Re: [PATCH v2 11/14] target/riscv: Adjust scalar reg in vector with XLEN, Richard Henderson, 2021/11/10
- [PATCH v2 12/14] target/riscv: Split out the vill from vtype, LIU Zhiwei, 2021/11/10
  - Re: [PATCH v2 12/14] target/riscv: Split out the vill from vtype, Richard Henderson, 2021/11/10
    - Re: [PATCH v2 12/14] target/riscv: Split out the vill from vtype, LIU Zhiwei, 2021/11/10
    - Re: [PATCH v2 12/14] target/riscv: Split out the vill from vtype, Richard Henderson, 2021/11/10

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