Re: [PATCH 1/2] riscv: opentitan: fixup plic stride len

[Alistair Francis]

On Mon, Jan 10, 2022 at 4:13 PM Alistair Francis
<alistair.francis@opensource.wdc.com> wrote:
>
> From: Wilfred Mallawa <wilfred.mallawa@wdc.com>
>
> The following change was made to rectify incorrectly set stride length
> on the PLIC. Where it should be 32bit and not 24bit (0x18). This was
> discovered whilst attempting to fix a bug where a timer_interrupt was
> not serviced on TockOS-OpenTitan.
>
> Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Tested-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/riscv/opentitan.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
> index c531450b9f..5144845567 100644
> --- a/hw/riscv/opentitan.c
> +++ b/hw/riscv/opentitan.c
> @@ -160,7 +160,7 @@ static void lowrisc_ibex_soc_realize(DeviceState 
> *dev_soc, Error **errp)
>      qdev_prop_set_uint32(DEVICE(&s->plic), "priority-base", 0x00);
>      qdev_prop_set_uint32(DEVICE(&s->plic), "pending-base", 0x1000);
>      qdev_prop_set_uint32(DEVICE(&s->plic), "enable-base", 0x2000);
> -    qdev_prop_set_uint32(DEVICE(&s->plic), "enable-stride", 0x18);
> +    qdev_prop_set_uint32(DEVICE(&s->plic), "enable-stride", 32);
>      qdev_prop_set_uint32(DEVICE(&s->plic), "context-base", 0x200000);
>      qdev_prop_set_uint32(DEVICE(&s->plic), "context-stride", 8);
>      qdev_prop_set_uint32(DEVICE(&s->plic), "aperture-size", 
> memmap[IBEX_DEV_PLIC].size);
> --
> 2.34.1
>