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[PATCH v5 13/13] target/riscv: enable riscv kvm accel
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From: |
Yifei Jiang |
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Subject: |
[PATCH v5 13/13] target/riscv: enable riscv kvm accel |
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Date: |
Wed, 12 Jan 2022 16:13:29 +0800 |
Add riscv kvm support in meson.build file.
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Mingwang Li <limingwang@huawei.com>
---
meson.build | 2 ++
1 file changed, 2 insertions(+)
diff --git a/meson.build b/meson.build
index c1b1db1e28..06a5476254 100644
--- a/meson.build
+++ b/meson.build
@@ -90,6 +90,8 @@ elif cpu in ['ppc', 'ppc64']
kvm_targets = ['ppc-softmmu', 'ppc64-softmmu']
elif cpu in ['mips', 'mips64']
kvm_targets = ['mips-softmmu', 'mipsel-softmmu', 'mips64-softmmu',
'mips64el-softmmu']
+elif cpu in ['riscv']
+ kvm_targets = ['riscv32-softmmu', 'riscv64-softmmu']
else
kvm_targets = []
endif
--
2.19.1
- [PATCH v5 04/13] target/riscv: Implement kvm_arch_get_registers, (continued)
- [PATCH v5 04/13] target/riscv: Implement kvm_arch_get_registers, Yifei Jiang, 2022/01/12
- [PATCH v5 05/13] target/riscv: Implement kvm_arch_put_registers, Yifei Jiang, 2022/01/12
- [PATCH v5 06/13] target/riscv: Support start kernel directly by KVM, Yifei Jiang, 2022/01/12
- [PATCH v5 07/13] target/riscv: Support setting external interrupt by KVM, Yifei Jiang, 2022/01/12
- [PATCH v5 08/13] target/riscv: Handle KVM_EXIT_RISCV_SBI exit, Yifei Jiang, 2022/01/12
- [PATCH v5 09/13] target/riscv: Add host cpu type, Yifei Jiang, 2022/01/12
- [PATCH v5 10/13] target/riscv: Add kvm_riscv_get/put_regs_timer, Yifei Jiang, 2022/01/12
- [PATCH v5 11/13] target/riscv: Implement virtual time adjusting with vm state changing, Yifei Jiang, 2022/01/12
- [PATCH v5 12/13] target/riscv: Support virtual time context synchronization, Yifei Jiang, 2022/01/12
- [PATCH v5 13/13] target/riscv: enable riscv kvm accel,
Yifei Jiang <=
- Re: [PATCH v5 00/13] Add riscv kvm accel support, Alistair Francis, 2022/01/17