Problem for getting HWCAP value from qemu-riscv user mode

[jiangfeilong]

Hi all,

 

I'm testing HWCAP on qemu-riscv64 user mode, and I found that `getauxval(AT_HWCAP)`

always returns the same value even if extra ISA extensions are enabled.

 

For example, when RVV is disabled by default:

 

```

$ riscv-qemu/bin/qemu-riscv64 -cpu rv64 test

auxval: 00000000000000000001000100101101

ACDFIM

```

 

or enable RVV manually:

 

```

$ riscv-qemu/bin/qemu-riscv64 -cpu rv64,v=true,vlen=256 test

auxval: 00000000000000000001000100101101

ACDFIM

```

 

Looks like it always returns "IMAFDC" ISA bit.

 

After I dig into the source code of `linux-user/elfload.c`, I found the following snippet:

 

```

static uint32_t get_elf_hwcap(void)

{

#define MISA_BIT(EXT) (1 << (EXT - 'A'))

    RISCVCPU *cpu = RISCV_CPU(thread_cpu);

    uint32_t mask = MISA_BIT('I') | MISA_BIT('M') | MISA_BIT('A')

                    | MISA_BIT('F') | MISA_BIT('D') | MISA_BIT('C');

 

    return cpu->env.misa & mask;

#undef MISA_BIT

}

```

 

Turns out the current implementation of ELF_HWCAP for RISC-V only set I, M, A, F, D and C bit.

Do we need to add more bits for ISA mask? (e.g. RVV bit V)

 

And one more question：

 

In current master of QEMU, Bit-Manipulation extensions zb* are enabled by default,

but HWCAP cannot detect those ISA extensions, is there any plan for multi-letter

ISA extensions detection through HWCAP?

 

----

 

Attatchments:

 

test.cc

```

#include <string.h>

#include <sys/auxv.h>

#include <bitset>

#include <iostream>

 

using namespace std;

 

int main(){

  unsigned int at = getauxval(AT_HWCAP);

  cout << "auxval: " << bitset<32>(at) << endl;

  string isa_str;

  int i = 0;

  while (at) {

    if (at & 1) {

        isa_str += 'A' + i;

    }

    at >>= 1;

    i++;

  }

  cout << isa_str << endl;

  return 0;

}

```

 

 

Best regards,

Feilong