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[uracoli-devel] SPI initializaion issue


From: Daniel Thiele
Subject: [uracoli-devel] SPI initializaion issue
Date: Sat, 15 Jan 2011 13:35:12 +0100
User-agent: Internet Messaging Program (IMP) H3 (4.1.3)

Dear uracoli developers,
during bringing up the muse231 board i just fell over the following issue:
- When initializing the SPI (ATmega88PA) the SPIF flag is set after SPCR = (_BV(SPE) | _BV(MSTR) - When executing the first function using SPI, e.g. trx_reg_read() the SPIF is still set and accessing SPDR leads to SPIF is cleared and WCOL (write collision is set) - The following SPI_WAITFOR(); infinitely waits for the SPIF (assuming end of SPI transfer) which never occurs

Possible ways to avoid this are:
(1)     Clearing SPIF manually after enabling SPI
(2)     Clearing SPIF (and WCOL) before each SPI access
(3)     Giving timeout to SPI_WAITFOR()

Perhaps this issue only affects ATmega88PA, I cant remember having this problems with previous types of MCUs? I would like to discuss the way to avoid this. In my opinion, clearing all SPIF and WCOL flags after initialization manually is a good approach. But in long terms the SPI access functions should be reworked to avoid infinite waiting (by software timeouts).

Following the code snippet for SPI initialization (taken from boards/muse231.h).

BTW: I would have handled this issue by dropping a bug entry but the new savannah password policies make it impossible for me to create a valid password (not enough characters, no digits, ...)

Best regards
Daniel


/**
 * @brief inline function for SPI initialization
 */
static inline void SPI_INIT(uint8_t spirate)
{
    /* first configure SPI Port, then SPCR */
    DDR_SPI  |= SPI_MOSI | SPI_SCK | SPI_SS;
    DDR_SPI  &= ~SPI_MISO;
    PORT_SPI |= SPI_SCK | SPI_SS;

    SPCR = (_BV(SPE) | _BV(MSTR));

    SPCR &= ~(_BV(SPR1) | _BV(SPR0) );
    SPSR &= ~_BV(SPI2X);

    SPCR |= (spirate & 0x03);
    SPSR |= ((spirate >> 2) & 0x01);
}






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