[Bug binutils/10924] Bug in objdump when disassembling raw armv4t binaries

[cvs-commit at gcc dot gnu dot org]

------- Additional Comments From cvs-commit at gcc dot gnu dot org  2009-12-17 
09:52 -------
Subject: Bug 10924

CVSROOT:        /cvs/src
Module name:    src
Changes by:     address@hidden  2009-12-17 09:52:18

Modified files:
        opcodes        : ChangeLog arm-dis.c 
        gas            : ChangeLog 
        gas/config     : tc-arm.c 
        gas/testsuite  : ChangeLog 
        gas/testsuite/gas/arm: unpredictable.d unpredictable.s 

Log message:
        PR binutils/10924
        * config/tc-arm.c (do_ldstv4): Do not allow r15 as the destination
        register.
        (do_mrs): Likewise.
        (do_mul): Likewise.
        
        * arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
        unique register numbers.  Extend support for %<>R format to
        thumb32 and coprocessor instructions.
        
        * gas/arm/unpredictable.s: Add more unpredictable instructions.
        * gas/arm/unpredictable.d: Add expected disassemblies.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1532&r2=1.1533
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/arm-dis.c.diff?cvsroot=src&r1=1.118&r2=1.119
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/gas/ChangeLog.diff?cvsroot=src&r1=1.4048&r2=1.4049
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/gas/config/tc-arm.c.diff?cvsroot=src&r1=1.420&r2=1.421
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/gas/testsuite/ChangeLog.diff?cvsroot=src&r1=1.1604&r2=1.1605
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/arm/unpredictable.d.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/arm/unpredictable.s.diff?cvsroot=src&r1=1.1&r2=1.2



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http://sourceware.org/bugzilla/show_bug.cgi?id=10924

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