Re: Net names in gds files

[JWS RH]

The only system I really know about is Cadence.
Cadence doesn't export any connectivity info
with stream output; it's just polygons and
instances and texts.

Cadence takes a layout and runs an extract
operation on it, using an extract .rul file,
and makes another layout-ish rep, the
'extracted' rep, for use by LVS. The extracted
contains only pins, nets and devices. The nets
that are generated are polygons (your 'arcs')
that are unitary equivalents of all of the
contiguous rectangles, polygons and/or paths
that made up the connection in the layout. If
the net traverses Z levels (M1/V1/M2/V2/M3/...)
the extracted polygons will be distinct (and at
the source level, but on the net instead of drawing
purpose (Cadence uses layer/purpose pairs). All
polygon segments of the net have a connectivity
property attached by the extract process, either
a user defined name (if you placed a pin) or net####
autogenerated.

Yet another Cadence operation intervenes between
the extraction and the LVS. The extract is a layout
to layout conversion which merely aggregates the
loose chunks into coherent bundles. There then is a
netlist creation phase which happens invisibly to
the user, after the LVS run is invoked. In the old
days, this was a sub-function of the si (Simulation
Interface) tool / script pile. si was a comglomeration
of every netlister for every simulator (of which LVS
might be considered a class). Netlist procedures vary
by target, modified by process-specific simulation
control / setup SKILL definitions that are autoloaded
as part of the startup (if you are working within a
predefined, foundry/process-specific design env.).

Because the extracted rep contains the low-level
connectivity info (auto-assigned net names, devices
found, etc.) the task becomes very similar to
schematic netlisting; polygons are wires, devices are
symbols (the devices placed in the extracted are 'lvs'
or 'auLvs' reps, often just symlinks to the matching
symbol; the extract rules define how a device is to
be recognized, and a lvs rep is placed on (or near)
the matching point in the layout, and the majority of
the silicon detail discarded).

Cadence's big success has been in making all of this
flailing-about invisible to the average user; it's
as big a kludge as any of them, but it looks like a
seamless monolith as long as you don't lift the
curtain.




> From: Steven Rubin <address@hidden>
> To: JWS RH <address@hidden>
> CC: address@hidden
> Subject: Re: Net names in gds files
> Date: Tue, 07 May 2002 17:54:31 -0700
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>
> > > Electric does not currently read any connectivity information from GDS
> > > files, nor does it have a node extractor that can create such 
> > > information.
> > > I am interested in improving the GDS reader to include connectivity, so
> > > if you, or anyone out there, knows how to get this information out of
> > > other CAD systems, and what the format is, let me know.
> >
> > This has seemed to be one of the biggest usefulness
> > barriers to me - that I can't use Electric to work
> > on existing circuit databases if I want to use the
> > LVS, because Electric requires arc constructs in
> > order to extract connectivity.
> >
> > So, might the answer be to force the gds readin to
> > make all paths, polygons into "arc" representations?
> > Then at least the layout connectivity could be gotten?
> >
> > That doesn't address attempting to pull net names
> > out of a gds file, which even Cadence won't do.
>
> You are absolutely right, Electric desparately needs a node extractor.  I
> am curious to know about any alternative ways of getting connectivity into
> the system.  Most of the GDS that I have seen does not make use of the
> connectivity.  Do you know of a way of getting other systems to "dump out"
> their connectivity information so that Electric can read it along with the
> geometry?
>
>    -Steven Rubin


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