[Discuss-gnuradio] Problem with the FPGA firmware (getting clock like output only)

[eenrti]

Hello list,
I have recently changed the USRP clock with an external PLL. Then I used 
the previously precompiled standard firmware std_4rx_0tx.rbf , using 2 
sinusoidal inputs to RXA, RXB and it was confirmed that everything was 
working fine. I then downloaded the 3.0.4 version and tried to recompile 
the usrp_std project. I used the usrp_std.rbf file produced in the 
rx_cfile.py, feeding the RXA, RXB each with a sinusoidal signal and when 
I plotted the output I found out that I was getting 0s and -1s only, as 
if I was getting clock pulses.

I then used again the std_4rx_0tx.rbf file which resulted in the 
expected output (sinusoidal signals at the same frequency) with 
amplitudes ranging from -15500 to 15500. .
I then used another firmware which actually produces known data from 
within the rx_buffer.v file, (a signal that cycles from 0 to 15 and back 
to 0) and the output was as expected again, linear increase from 0 to 15 
and then back to 0.
I then tried other versions of the firmware that there were working, as 
Peter Monta's variable width and shift firmware, but again I was getting 
values almost down to 0.

Does anyone has an idea what might be wrong? Why do some .rbfs working 
and some not?

Thank you

Rigas