RE: Handling code generators

[Paul D. Smith]

%% Stephen Byan <address@hidden> writes:

  sb> Your problem is essentially the same as handling the dependencies
  sb> of object files (.o's) on header files (.h files); you could use
  sb> the same solution.

Unfortunately it's more complex, since he doesn't have any way of
writing an implicit rule, since there's no way to calculate the target
file name based on the source file name.

%% Sankaranarayanan K V <address@hidden> writes:

  skv> Consider a code generator which takes a file named 'a.spec' and
  skv> generates a set of source files say 'Foo.cc', 'Bar.cc', etc.

  skv> The names of the generated files cannot be predicted from the
  skv> name of the spec file. (That means, it _may_ not be possible to
  skv> use any pattern rules to relate the generated code files and the
  skv> spec file.)

  skv> The number of generated files is not fixed. It depends on the
  skv> contents of the spec file.

  skv> All the generated sources need to be compiled and built into a
  skv> library.

  skv> In this situation, how do I set up the dependencies?
  skv> And how do I get the sources built?

In this type of situation I think you'll have to use the auto re-exec
feature of make.

You'll have to have a way to discover what files are generated by the
code generator; this can either be as a side effect of actually
generating the code (more efficient) or a separate, "makedepend" kind of
thing.

Here's how you could do it if you had the former (results as a
side-effect of doing the generation):

  SPEC_FILES    = a.spec b.spec c.spec

  CC_FILES      =

  include $(SPEC_FILES:.spec=.out)

  %.out : %.spec
        $(GENERATE) --outfilelist=$@ $<

  libfoo.a: $(CC_FILES:.cc=.o)

Here, I'm conjecturing a new option to your generator called
"--outfilelist" which takes an argument as a filename, and the syntax of
that filename would be adding to the makefile variable CC_FILES, like
this:

  CC_FILES += Foo.cc Bar.cc

How does this work?  Well, make always tries to rebuild all of the files
it includes, so it will run the GENERATE command for any .spec files
which are newer than the .out files.  That will generate the .cc files
and _also_ generate the to-be-included file (xxx.out).  Then, if make
rebuilds one or more of these, it will re-exec itself.  The second time
through it won't build anything because the .out files will be
up-to-date; it will include them and have all their .cc values added to
the variable CC_FILES, then it will build libfoo.a based on those
files.

Obviously there are ways to make this slightly more generic.

If you use a "makedepend" method you can still do the same thing, but
you'd need to do it in two commands.

One problem with this: when you first run the make you'll get lots of
warnings about missing includes, as the .out files won't exist the first
time :-/.

-- 
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