Pattern rule prereqs are variables with % in them

[Boucher, Jean]

I'm fairly new to writing Makefiles, so please be gentle. I couldn't
find the answer to this in the Make v3.80 Manual, & don't know where to
go from here. 

As an example, shouldn't I be able to write the pattern rule in the
common file, below?


--------------------------------------- begin target-specific file
MODULE = Example

# This Makefile's local outputs
lcl_outputs = $(MODULE).elf $(MODULE).bin (MODULE).lib

# This Makefile's local inputs
Example.elf_objs = init.o services.o extra.o
Example.elf_libs = external.lib outside.lib

Example.lib_objs = services.o extra.o
Example.lib_libs = external.lib outside.lib

.PHONY: all

$(MODULE) all: $(lcl_outputs) $(all_ext_libs)
        @echo "Made $(MODULE)."

$(all_ext_libs):
        @echo '$(MODULE) hit all_ext_libs rule for $@'
        $(MAKE) -C $(LIB_DIR)/(basename $@)

--------------------------------------- end target-specific file 
--------------------------------------- begin common file
%.elf:
        $(%.elf_objs)  $(%.elf_libs)
        echo 'Hit .elf pattern rule for address@hidden tgt=$@,prereq=$^';\
        <link command>

%.lib: $(%.lib_objs) $(%.lib_libs)
        @echo "Hit .lib .lib_objs pattern rule for $@";\
        <libar command>

%.bin:  %.elf
        echo 'Hit .bin pattern rule for $@';\
        <bin command>
--------------------------------------- end common file

When I try this, I get "*** No rule to make target `Example.elf', needed
by `Example'.  Stop."


I've been following the  GNU Make Manual, last updated 08 July 2002,
that documents GNU make Version 3.80 to do this in a WinXP/Cygwin
environment. 'make -v' and 'make --help' respectively report:
    GNU Make 3.80
    This program built for i686-pc-cygwin

Jean.

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