RE: Pattern rule prereqs are variables with % in them

[Boucher, Jean]

Greg,
Yes, I use the 'include' command to bring-I the rules,but no, that's not
the output I want. I hadn't made a working example because I thought you
might find a fundamental error with what I was trying to do. OK, if that
syntax is allowed, then here's the working example I ran. If you diff
it, you'll see that after minor corrections, it's essentially the same
as what I sent you before, but let's work from this:

--------------------------------------- begin target-specific file
MODULE=Example

# This Makefile's local outputs
lcl_outputs = $(MODULE).elf $(MODULE).bin $(MODULE).lib

# collect all external libs required to make all local ouputs
all_ext_libs = external.lib outside.lib

# This Makefile's local inputs
Example.elf_objs = init.o services.o extra.o
Example.elf_libs = external.lib outside.lib

Example.lib_objs = services.o extra.o
Example.lib_libs = external.lib outside.lib

.PHONY: all

$(MODULE) all: $(lcl_outputs) $(all_ext_libs)
        @echo 'Made $@, prereqs=$^'

$(all_ext_libs):
        @echo '$(MODULE) hit all_ext_libs rule for $@'

include common.mk

--------------------------------------- end target-specific file 

--------------------------------------- begin common file
%.elf:
        $(%.elf_objs)  $(%.elf_libs)
        echo 'Hit .elf pattern rule for $@, prereqs=$^';\
#       <link command>

%.lib: $(%.lib_objs) $(%.lib_libs)
        @echo 'Hit .lib .lib_objs pattern rule for $@, prereqs=$^';\
#       <libar command>

%.bin:  %.elf
        echo 'Hit .bin pattern rule for $@, prereqs=$^';\
#       <bin command>
--------------------------------------- end common file

And here's the output:
--------------------------------------- begin output
> make -s
Hit .elf pattern rule for Example.elf, prereqs=
Hit .bin pattern rule for Example.bin, prereqs=Example.elf
Hit .lib .lib_objs pattern rule for Example.lib, prereqs=
Example hit all_ext_libs rule for external.lib
Example hit all_ext_libs rule for outside.lib
Made Example, prereqs=Example.elf Example.bin Example.lib external.lib
outside.lib
--------------------------------------- end output

Notice in the output that the prereqs are empty for the .elf and .lib
rules, therefore, it doesn't even attempt to look for the needed object
and library files (the .elf and .lib prereqs) before the .elf and .lib
targets, as it should. If it did, we would see some mention of
attempting to make init.o, services.o, and extra.o (ie:
$(Example.elf_objs)), and not being able to find external.lib and
outside.lib (ie: $(Example.elf_objs)). The entire output we see is due
to the default rule ($(MODULE) all:) and its prereqs ($(lcl_outputs)
$(all_ext_libs)). So, the question is; Why are prereqs empty on output
lines 1 and 3?

Jean. 


-----Original Message-----
From: Greg Chicares [mailto:address@hidden 
Sent: Saturday, September 03, 2005 10:54 AM
To: Boucher, Jean
Cc: address@hidden
Subject: Re: Pattern rule prereqs are variables with % in them


On 2005-9-2 21:42 UTC, Boucher, Jean wrote:
> 
[snip example]
> 
> When I try this, I get "*** No rule to make target `Example.elf', 
> needed by `Example'.  Stop."

I copied your example into one file, adding '#' before comments. That
way, it seems to work:

  echo 'Hit .elf pattern rule for Example.elf.
tgt=Example.elf,prereq=';\
  #       <link command>
  Hit .elf pattern rule for Example.elf. tgt=Example.elf,prereq=
  echo 'Hit .bin pattern rule for Example.bin';\
  #       <bin command>
  Hit .bin pattern rule for Example.bin
  Hit .lib .lib_objs pattern rule for (MODULE).lib
  Made Example.

Is this the output what you wanted?

If so, the problem is the way you're factoring this into two files. Do
you use 'include' to reference one from the other, for example?

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