Re: [lwip-users] Recv UDP Problem

[Mike Fleetwood]

Hi,

I'm just starting the same process - migrating from m4 to m7 (eventually 
h7).

Surely the cache memory gets invalidated automatically regardless of the 
source of writing to it?

Many thanks,

Mike (a different one!).


On 25/11/2016 16:35, Michael Steinberg wrote:
> Hi,
>
> You were reporting the same software works on m4 but fails to work 
> reliably on m7. The most prominent difference that can cause issues 
> between m4 and m7 is that the latter has data caches, where the former 
> has none. Possible situation: The dma writes a frame to cached memory, 
> the mcu data cache is not invalidated, interrupt is raised, the isr 
> which polls the dma descriptor chain reads from memory but gets a 
> cache hit and reads outdated data.
>
> Michael
>
>
> Am 25.11.2016 um 14:34 schrieb mgirke:
> > @Michael: What exactly do you mean?
> >
> > no so far I am using two netconns, one for each task. but good to know
> > 2.0.0. offers that.
> >
> > thanks!
> >
> >
> >
> > --
> > View this message in context: 
> > http://lwip.100.n7.nabble.com/Recv-UDP-Problem-tp27826p27900.html
> > Sent from the lwip-users mailing list archive at Nabble.com.
> >
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