[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 02/36] hw/misc/a9scu: Simplify setting MemoryRegionOps::valid fiel
From: |
Peter Maydell |
Subject: |
[PULL 02/36] hw/misc/a9scu: Simplify setting MemoryRegionOps::valid fields |
Date: |
Mon, 14 Sep 2020 15:06:07 +0100 |
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Per the datasheet (DDI0407 r2p0):
"All SCU registers are byte accessible" and are 32-bit aligned.
Set MemoryRegionOps::valid min/max fields and simplify the write()
handler.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200901144100.116742-3-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/misc/a9scu.c | 21 +++++----------------
1 file changed, 5 insertions(+), 16 deletions(-)
diff --git a/hw/misc/a9scu.c b/hw/misc/a9scu.c
index 915f127761e..3f3dcc414fe 100644
--- a/hw/misc/a9scu.c
+++ b/hw/misc/a9scu.c
@@ -52,23 +52,8 @@ static void a9_scu_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
A9SCUState *s = (A9SCUState *)opaque;
- uint32_t mask;
+ uint32_t mask = MAKE_64BIT_MASK(0, size * 8);
uint32_t shift;
- switch (size) {
- case 1:
- mask = 0xff;
- break;
- case 2:
- mask = 0xffff;
- break;
- case 4:
- mask = 0xffffffff;
- break;
- default:
- fprintf(stderr, "Invalid size %u in write to a9 scu register %x\n",
- size, (unsigned)offset);
- return;
- }
switch (offset) {
case 0x00: /* Control */
@@ -99,6 +84,10 @@ static void a9_scu_write(void *opaque, hwaddr offset,
static const MemoryRegionOps a9_scu_ops = {
.read = a9_scu_read,
.write = a9_scu_write,
+ .valid = {
+ .min_access_size = 1,
+ .max_access_size = 4,
+ },
.endianness = DEVICE_NATIVE_ENDIAN,
};
--
2.20.1
- [PULL 00/36] target-arm queue, Peter Maydell, 2020/09/14
- [PULL 01/36] hw/misc/a9scu: Do not allow invalid CPU count, Peter Maydell, 2020/09/14
- [PULL 02/36] hw/misc/a9scu: Simplify setting MemoryRegionOps::valid fields,
Peter Maydell <=
- [PULL 03/36] hw/misc/a9scu: Simplify setting MemoryRegionOps::impl fields, Peter Maydell, 2020/09/14
- [PULL 04/36] hw/misc/a9scu: Report unimplemented accesses with qemu_log_mask(UNIMP), Peter Maydell, 2020/09/14
- [PULL 05/36] hw/timer/armv7m_systick: assert that board code set system_clock_scale, Peter Maydell, 2020/09/14
- [PULL 06/36] decodetree: Improve identifier matching, Peter Maydell, 2020/09/14
- [PULL 07/36] target/arm: Convert Neon 3-same-fp size field to MO_* in decode, Peter Maydell, 2020/09/14
- [PULL 08/36] target/arm: Convert Neon VCVT fp size field to MO_* in decode, Peter Maydell, 2020/09/14
- [PULL 09/36] target/arm: Convert VCMLA, VCADD size field to MO_* in decode, Peter Maydell, 2020/09/14
- [PULL 11/36] target/arm: Remove no-longer-reachable 32-bit KVM code, Peter Maydell, 2020/09/14
- [PULL 10/36] target/arm: Remove KVM support for 32-bit Arm hosts, Peter Maydell, 2020/09/14
- [PULL 12/36] hw/arm/mps2: New board model mps2-an386, Peter Maydell, 2020/09/14