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[PULL 27/43] target/arm: Enforce alignment for LDM/STM
From: |
Peter Maydell |
Subject: |
[PULL 27/43] target/arm: Enforce alignment for LDM/STM |
Date: |
Fri, 30 Apr 2021 11:34:21 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210419202257.161730-18-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index f5a214e35e5..9095c4a86f3 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -7884,7 +7884,7 @@ static bool op_stm(DisasContext *s, arg_ldst_block *a,
int min_n)
} else {
tmp = load_reg(s, i);
}
- gen_aa32_st32(s, tmp, addr, mem_idx);
+ gen_aa32_st_i32(s, tmp, addr, mem_idx, MO_UL | MO_ALIGN);
tcg_temp_free_i32(tmp);
/* No need to add after the last transfer. */
@@ -7959,7 +7959,7 @@ static bool do_ldm(DisasContext *s, arg_ldst_block *a,
int min_n)
}
tmp = tcg_temp_new_i32();
- gen_aa32_ld32u(s, tmp, addr, mem_idx);
+ gen_aa32_ld_i32(s, tmp, addr, mem_idx, MO_UL | MO_ALIGN);
if (user) {
tmp2 = tcg_const_i32(i);
gen_helper_set_user_reg(cpu_env, tmp2, tmp);
--
2.20.1
- [PULL 35/43] target/arm: Use finalize_memop for aa64 gpr load/store, (continued)
- [PULL 35/43] target/arm: Use finalize_memop for aa64 gpr load/store, Peter Maydell, 2021/04/30
- [PULL 40/43] target/arm: Enforce alignment for aa64 vector LDn/STn (single), Peter Maydell, 2021/04/30
- [PULL 43/43] hw/pci-host/gpex: Don't fault for unmapped parts of MMIO and PIO windows, Peter Maydell, 2021/04/30
- [PULL 41/43] target/arm: Enforce alignment for sve LD1R, Peter Maydell, 2021/04/30
- [PULL 30/43] target/arm: Enforce alignment for VLDM/VSTM, Peter Maydell, 2021/04/30
- [PULL 23/43] target/arm: Fix SCTLR_B test for TCGv_i64 load/store, Peter Maydell, 2021/04/30
- [PULL 33/43] target/arm: Enforce alignment for VLDn/VSTn (multiple), Peter Maydell, 2021/04/30
- [PULL 32/43] target/arm: Enforce alignment for VLDn (all lanes), Peter Maydell, 2021/04/30
- [PULL 37/43] target/arm: Enforce alignment for aa64 load-acq/store-rel, Peter Maydell, 2021/04/30
- [PULL 38/43] target/arm: Use MemOp for size + endian in aa64 vector ld/st, Peter Maydell, 2021/04/30
- [PULL 27/43] target/arm: Enforce alignment for LDM/STM,
Peter Maydell <=
- [PULL 42/43] hw: add compat machines for 6.1, Peter Maydell, 2021/04/30
- Re: [PULL 00/43] target-arm queue, no-reply, 2021/04/30
- Re: [PULL 00/43] target-arm queue, Peter Maydell, 2021/04/30