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[RFC 02/10] target/riscv: rvb: add carry-less multiply instructions


From: Eric Tang
Subject: [RFC 02/10] target/riscv: rvb: add carry-less multiply instructions
Date: Sat, 18 Sep 2021 14:28:08 +0800

Signed-off-by: Eric Tang <tangxingxin1008@gmail.com>

diff --git a/target/riscv/bitmanip_helper.c b/target/riscv/bitmanip_helper.c
index 5b2f795d03..e31cf582ca 100644
--- a/target/riscv/bitmanip_helper.c
+++ b/target/riscv/bitmanip_helper.c
@@ -88,3 +88,38 @@ target_ulong HELPER(gorcw)(target_ulong rs1, target_ulong 
rs2)
 {
     return do_gorc(rs1, rs2, 32);
 }
+
+#define DO_CLMULA(NAME, NUM, BODY)                          \
+static target_ulong do_##NAME(target_ulong rs1,             \
+                              target_ulong rs2,             \
+                              int bits)                     \
+{                                                           \
+    target_ulong x = 0;                                     \
+    int i;                                                  \
+                                                            \
+    for (i = NUM; i < bits; i++) {                          \
+        if ((rs2 >> i) & 1) {                               \
+            x ^= BODY;                                      \
+        }                                                   \
+    }                                                       \
+    return x;                                               \
+}
+
+DO_CLMULA(clmul, 0, (rs1 << i))
+DO_CLMULA(clmulh, 1, (rs1 >> (bits - i)))
+DO_CLMULA(clmulr, 0, (rs1 >> (bits - i - 1)))
+
+target_ulong HELPER(clmul)(target_ulong rs1, target_ulong rs2)
+{
+    return do_clmul(rs1, rs2, TARGET_LONG_BITS);
+}
+
+target_ulong HELPER(clmulh)(target_ulong rs1, target_ulong rs2)
+{
+    return do_clmulh(rs1, rs2, TARGET_LONG_BITS);
+}
+
+target_ulong HELPER(clmulr)(target_ulong rs1, target_ulong rs2)
+{
+    return do_clmulr(rs1, rs2, TARGET_LONG_BITS);
+}
diff --git a/target/riscv/helper.h b/target/riscv/helper.h
index 460eee9988..7cbcee48e6 100644
--- a/target/riscv/helper.h
+++ b/target/riscv/helper.h
@@ -63,6 +63,9 @@ DEF_HELPER_FLAGS_2(grev, TCG_CALL_NO_RWG_SE, tl, tl, tl)
 DEF_HELPER_FLAGS_2(grevw, TCG_CALL_NO_RWG_SE, tl, tl, tl)
 DEF_HELPER_FLAGS_2(gorc, TCG_CALL_NO_RWG_SE, tl, tl, tl)
 DEF_HELPER_FLAGS_2(gorcw, TCG_CALL_NO_RWG_SE, tl, tl, tl)
+DEF_HELPER_FLAGS_2(clmul, TCG_CALL_NO_RWG_SE, tl, tl, tl)
+DEF_HELPER_FLAGS_2(clmulh, TCG_CALL_NO_RWG_SE, tl, tl, tl)
+DEF_HELPER_FLAGS_2(clmulr, TCG_CALL_NO_RWG_SE, tl, tl, tl)
 
 /* Special functions */
 DEF_HELPER_2(csrr, tl, env, int)
diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode
index 2cd921d51c..9eff9d5f5c 100644
--- a/target/riscv/insn32.decode
+++ b/target/riscv/insn32.decode
@@ -690,6 +690,9 @@ gorc       0010100 .......... 101 ..... 0110011 @r
 sh1add     0010000 .......... 010 ..... 0110011 @r
 sh2add     0010000 .......... 100 ..... 0110011 @r
 sh3add     0010000 .......... 110 ..... 0110011 @r
+clmul      0000101 .......... 001 ..... 0110011 @r
+clmulh     0000101 .......... 011 ..... 0110011 @r
+clmulr     0000101 .......... 010 ..... 0110011 @r
 
 bseti      00101. ........... 001 ..... 0010011 @sh
 bclri      01001. ........... 001 ..... 0010011 @sh
diff --git a/target/riscv/insn_trans/trans_rvb.c.inc 
b/target/riscv/insn_trans/trans_rvb.c.inc
index 96b6fcb41d..1d999929de 100644
--- a/target/riscv/insn_trans/trans_rvb.c.inc
+++ b/target/riscv/insn_trans/trans_rvb.c.inc
@@ -321,6 +321,17 @@ static bool trans_gorci(DisasContext *ctx, arg_gorci *a)
     return gen_shift_imm_tl(ctx, a, EXT_ZERO, gen_helper_gorc);
 }
 
+#define GEN_TRANS_CLMUL(NAME)                               \
+static bool trans_##NAME(DisasContext *ctx, arg_##NAME * a) \
+{                                                           \
+    REQUIRE_EXT(ctx, RVB);                                  \
+    return gen_arith(ctx, a, EXT_NONE, gen_helper_##NAME);  \
+}
+
+GEN_TRANS_CLMUL(clmul)
+GEN_TRANS_CLMUL(clmulh)
+GEN_TRANS_CLMUL(clmulr)
+
 #define GEN_SHADD(SHAMT)                                       \
 static void gen_sh##SHAMT##add(TCGv ret, TCGv arg1, TCGv arg2) \
 {                                                              \
-- 
2.17.1




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